Displaying 3 results from an estimated 3 matches for "constraintcod".
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constraintcode
2008 May 20
0
[LLVMdev] [ia64] Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
...the following:
3817 // This is a reference to a register class that doesn't
directly correspond
3818 // to an LLVM register class. Allocate NumRegs consecutive,
available,
3819 // registers from the class.
3820 RegClassRegs =
TLI.getRegClassForInlineAsmConstraint(OpInfo.ConstraintCode,
3821
OpInfo.ConstraintVT);
Is it me or is the comment not really applicable to this particular
case?
thanks,
--
Marcel Moolenaar
xcllnt at mac.com
2008 May 20
2
[LLVMdev] [ia64] Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
All,
The following IR is causing the assert:
\begin{ll}
; ModuleID = 'x.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-
i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-
f80:128:128"
target triple = "ia64-portbld-freebsd8.0"
define void @__ia64_set_fast_math() nounwind {
entry:
tail call void asm sideeffect "mov.m
2015 Mar 03
5
[LLVMdev] Inline Assembly: Memory constraints with offsets
Hi,
I'm trying to implement the ZC inline assembly constraint for Mips. This constraint is a memory constraint that expands to an address with an offset (the range of the offset varies according to the subtarget), so the inline assembly in:
int data[10];
void ZC(void) {
asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2]));
}
Should expand to