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Hi! Can anyone point to general directions, on how to build dll for osx under windows system? I guess I need to get mingw and some certain toolchain components? As I am new to this, I'll appreciate any kind of concerete advice or directions. Regards, Konstantin. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/opus/attachments/20160223/5dcbd31a/attachment.htm

...en't necessarily transitive. I'd like at the <yourtarget>GenRegisterInfo.inc file, and see what it lists as the aliases for each reg. > But a more interesting question is this: The scheme above assumes that > there is a "hardwired" mapping between FP registers and concerete pairs > of integer registers. In many cases this is enough, since the emulated > operations indeed expect parameters on predefined pairs of 32bit integer > registers. But when it comes to other uses of FP registers (mainly for > storing some values) there is no this limitation that...

...r register set explicitly. I thought that aliases are transitive? Or do I have to mention all aliases explicitly, e.g. for %d0 I need to say [%s0,%s1,%GR0,%GR1]? But a more interesting question is this: The scheme above assumes that there is a "hardwired" mapping between FP registers and concerete pairs of integer registers. In many cases this is enough, since the emulated operations indeed expect parameters on predefined pairs of 32bit integer registers. But when it comes to other uses of FP registers (mainly for storing some values) there is no this limitation that a concrete pair of integ...

On Mon, 9 Oct 2006, Roman Levenstein wrote: > I'm now ready to implement the FP support for my embedded target. cool. > My target supports only f64 at the moment. > Question: How can I tell LLVM that float is the same as double on my > target? May be by assigning the same register class to both MVT::f32 > and MVT::f64? Just don't assign a register class for the f32 type.

Hi, I'm now ready to implement the FP support for my embedded target. My target supports only f64 at the moment. Question: How can I tell LLVM that float is the same as double on my target? May be by assigning the same register class to both MVT::f32 and MVT::f64? But FP is supported only in the emulated mode, because the target does not have any hardware support for FP. Therefore each FP

...y imagine non-transitive aliasing semantics. If you think that this makes sense, I could probably write a patch for tblgen to do that. > > But a more interesting question is this: The scheme above assumes > that > > there is a "hardwired" mapping between FP registers and concerete > pairs > > of integer registers. In many cases this is enough, since the > emulated > > operations indeed expect parameters on predefined pairs of 32bit > integer > > registers. But when it comes to other uses of FP registers (mainly > for > > storing some v...