search for: cmprr

...3; IntRegs:%reg16387 %reg16386<def> = COPY %R2; IntRegs:%reg16386 %reg16385<def> = COPY %R1; IntRegs:%reg16385 %reg16384<def> = COPY %R0; IntRegs:%reg16384 %reg16390<def> = MOVE %reg16386; IntRegs:%reg16390,16386 %reg16388<def> = CMPrr %reg16384, %reg16385, %CFR<imp-def,dead>; IntRegs:%reg16388,16384,16385 SKIPCOND 1, %CFR<imp-use> Successors according to CFG: BB#2 BB#1 BB#1: derived from LLVM BB %entry Predecessors according to CFG: BB#0 %reg16391<def> = MOVE %reg16387; IntRegs:%reg1639...

Hello Per, > The CMPrr instruction is moved down to after the PHI node. My guess is that > the 'dead' in CFR<imp-def,dead> is to blame, but I can't see what I'm doing > differently from MSP430/sparc that makes this not work. Any help GREATLY > appreciated! It seems like no use of CFR after...

But in the first version it's used on the next row: %reg16388<def> = CMPrr %reg16384, %reg16385, %CFR<imp-def,dead>; IntRegs:%reg16388,16384,16385 SKIPCOND 1, *%CFR<imp-use>* Or doesn't that count? Following are patters for cmp and skipcond: def cmpcc : SDNode<"CSISD::CMP", SDTIntBinOp, [SDNPOutFlag]>; let Defs = [CFR] in { def CM...

...kend for a custom intrinsic. Basically, I want to emit the following the following instruction sequence: cmp r0, r1 moveq r2, #1 To implement this, I first emit a compare instruction and then I'm trying to emit the conditional move, which is failing. BuildMI(&MBB, DL, TII->get(ARM::CMPrr)) .addReg(MI.getOperand(1).getReg()) .addReg(MI.getOperand(2).getReg()) .addImm(ARMCC::EQ); BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVr), MI.getOperand(0).getReg()) .addImm(ARMCC::EQ) .addImm(1) .addReg(0); /...

Hi, I'm trying to add a new intrinsic to the ARM backend. The intrinsic should a custom comparison. To do so, I started with first defining the intrinsic in llvm/include/llvm/IR/intrinsicsARM.td: def int_foo_cmp : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; The second step I did is adding a new pseudo instruction matching that intrinsic in lib/Target/ARM/ARMInstInfo.td: