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but does it have default values ? Thanks Xin On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote: > You specify shader model, bit size and etc. arch-specified parameters > though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use > the GPU thread/block/grid size information in optimization yet. > > On Mon, Mar 12, 2012 at 8:17 PM, Xin Tong <x...

I don't think so, but you should check source code. On Tue, Mar 13, 2012 at 9:58 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: > but does it have default values ? > > Thanks > > Xin > > On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote: >> You specify shader model, bit size and etc. arch-specified parameters >> though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use >> the GPU thread/block/grid size information in optimization yet. >> >> On Mon, Mar 12, 2012 at 8:1...

Che-Liang Chiou <clchiou at gmail.com> writes: > Hi there, > > Thank Nick for kindly reviewing the patch. Here is the link to the > source code of the PTX backend; it would help Nick review the patch. > http://lime.csie.ntu.edu.tw/~clchiou/llvm-ptx-backend.tar.gz Great! > I decided to take the code...

Che-Liang Chiou <clchiou at gmail.com> writes: > My implementation of predicated instructions is similar to ARM > backend. I traced ARM and PowerPC backend for reference. Cool. > If, David, you were saying a implementation of predication in LLVM IR, > I didn't do that. It was partly because I was not...

...ounces at cs.uiuc.edu] > On Behalf Of David A. Greene > Sent: Tuesday, August 10, 2010 12:02 PM > To: Che-Liang Chiou > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Upstream PTX backend that uses target > independent code generator if possible > > Che-Liang Chiou <clchiou at gmail.com> writes: > > > I surfed their code, and it seems that they didn't use code > generator. > > That means there design should be similar to CBackend or CPPBackend. > > So I guess it can't generate some machine instructions like MAD, > > and there...

Hi there, I have a working prototype of PTX backend, and I would like to upstream it if possible. This backend is implemented by LLVM's target independent code generator framework; I think this will make it easier to maintain. I have tested this backend to translate a work-efficient parallel scan kernel ( http://http.developer.nvidia.com/GPUGems3/gpugems3_ch39.html ) into PTX code. The

Thanks David for the comments. Sorry for the late reply. On Mon, Aug 23, 2010 at 11:52 PM, David A. Greene <greened at obbligato.org> wrote: > Che-Liang Chiou <clchiou at gmail.com> writes: > >> Hi there, >> >> Thank Nick for kindly reviewing the patch.  Here is the link to the >> source code of the PTX backend; it would help Nick review the patch. >> http://lime.csie.ntu.edu.tw/~clchiou/llvm-ptx-backend.tar.gz > > Great!...

Hi there, Thank Nick for kindly reviewing the patch. Here is the link to the source code of the PTX backend; it would help Nick review the patch. http://lime.csie.ntu.edu.tw/~clchiou/llvm-ptx-backend.tar.gz The source code from above link is a working prototype. So it will not be upstreamed as is; I will refactor and add unimplemented features while upstreaming it. That said, the source code from above link * is not guarantee to be compilable on other machines, * is not stab...

...On Behalf Of David A. Greene >> Sent: Tuesday, August 10, 2010 12:02 PM >> To: Che-Liang Chiou >> Cc: llvmdev at cs.uiuc.edu >> Subject: Re: [LLVMdev] Upstream PTX backend that uses target >> independent code generator if possible >> >> Che-Liang Chiou <clchiou at gmail.com> writes: >> >> > I surfed their code, and it seems that they didn't use code >> generator. >> > That means there design should be similar to CBackend or CPPBackend. >> > So I guess it can't generate some machine instructions like MAD, &...

Che-Liang Chiou <clchiou at gmail.com> writes: > I surfed their code, and it seems that they didn't use code generator. > That means there design should be similar to CBackend or CPPBackend. > So I guess it can't generate some machine instructions like MAD, > and there are some PTX instruction set f...

Che-Liang Chiou <clchiou at gmail.com> writes: > Hi there, > > I have a working prototype of PTX backend, and I would like to > upstream it if possible. This backend is implemented by LLVM's target > independent code generator framework; I think this will make it easier > to maintain. How does t...

Hi David, Thanks for asking. On Mon, Aug 9, 2010 at 3:25 PM, David A. Greene <greened at obbligato.org> wrote: > Che-Liang Chiou <clchiou at gmail.com> writes: > >> Hi there, >> >> I have a working prototype of PTX backend, and I would like to >> upstream it if possible.  This backend is implemented by LLVM's target >> independent code generator framework; I think this will make it easier >&...

On Fri, Oct 7, 2011 at 11:05 PM, David A. Greene <greened at obbligato.org> wrote: > Che-Liang Chiou <clchiou at gmail.com> writes: > >> My purpose is to eliminate copy-paste style of programming in td files >> as much as possible, but only to a point that the new language >> constructs do not create too much overhead/readability-downgrade. > > Yes! > >> In other word...

Che-Liang Chiou <clchiou at gmail.com> writes: > My purpose is to eliminate copy-paste style of programming in td files > as much as possible, but only to a point that the new language > constructs do not create too much overhead/readability-downgrade. Yes! > In other words, I am targeting those low-hangi...

On Fri, Aug 6, 2010 at 6:47 PM, Che-Liang Chiou <clchiou at gmail.com> wrote: > Hi there, > > I have a working prototype of PTX backend, and I would like to > upstream it if possible.  This backend is implemented by LLVM's target > independent code generator framework; I think this will make it easier > to maintain. > > I h...

Hi Justin, There are some backward incompatible features of PTX; for example, special registers are redefined as v4i32 (they were v4i16) in PTX 2.0. And CUDA 4.0 was rolled out last week. I heard that some instructions are deprecated. I am not sure how stable (or unstable) PTX specification is. Do you have a rough assessment of its stability? If PTX specification is still fast evolving, I would

I am wondering that how does the LLVM PTX backend find out the constraints on executing GPU thread/block/grid size ( i.e. a block can at most have 1024 threads). Can anyone point me to the code ? I need information in the optimizer, how can I get it ? Thanks Xin

You specify shader model, bit size and etc. arch-specified parameters though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use the GPU thread/block/grid size information in optimization yet. On Mon, Mar 12, 2012 at 8:17 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: > I am wondering that how does the LLVM PTX backend find out the > constraints on executing GPU

Hi Jakob and David, The for-loop inside multiclass definition does not have to add extra abstraction layer. As in the pseudo codes that David wrote earlier (see below), it only condenses the repetitive 'def' statements inside the multiclass definition into a more compact and less copy-paste style form, instead of encapsulating them somewhere outside the multiclass definition. I believe

...is clearly not where the code owners want it to go. Also, just so we are clear on this, Jakob is effectively the TableGen code owner. He will have the final say on all related issues. Evan (putting on my code owner hat) On Oct 7, 2011, at 8:05 AM, David A. Greene wrote: > Che-Liang Chiou <clchiou at gmail.com> writes: > >> My purpose is to eliminate copy-paste style of programming in td files >> as much as possible, but only to a point that the new language >> constructs do not create too much overhead/readability-downgrade. > > Yes! > >> In other w...