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From: Chris Chiu <chiu at endlessm.com> This new graphics card was failing to initialize with nouveau due to an "unknown chipset" error. Copy the GP106 configuration and rename for GP107/NV137. We don't know for certain that this is fully correct, but brief desktop testing suggests this is wor...

Nouveau driver shows unknown chipset (136000a1) for GTX 1060, so it only gives VGA resolution on screen. Use the same chipset as nv134 then it shows FullHD. This commit copies fields from nv134_chipset to nv136_chipset for GTX 1060. Signed-off-by: Chris Chiu <chiu at endlessm.com> --- drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 7218a06..7c6eece 100644 --- a/...

Hi, all, Is the Xen currently compatible with the InfiniBand? I found some information about the Smart I/O module, but it was posted in 2006. Is the module still maintained? Or, are there any up-to-date alternatives for that? Many thanks, Chiu _______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users

Hi I would like to learn how the R function "hclust" deals with ties. It is written in Fortran, so I cannot access the code. Thanks!! [[alternative HTML version deleted]]

The BGL (Boost Graph Library) defines tie(), which is exactly what the tie() defined in STLExtras.h. The header files of GBL use boost::tie(), and other boost libraries use boost::tie() too. How to resolve the ambiguity for compiler? -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://www.csie.nctu.edu.tw/~jwchiu>

We are working with new desktop that have the NVIDIA NV118 chipset. During boot, the display becomes unusable at the point where the nouveau driver loads. We have reproduced on 4.8, 4.11 and linux master (4.12-rc3). Dmesg log is attached. Is this a known issue? Anything we can do to help? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

i set up a samba on redhat with a 192.168.x.x ip and and alias of a real ip. on the lan i have win nt and win 2k with real ip that can access the samba without difficulty, but when the win 98/me workstations, with 192.168.x.x ip's, try to connect to the samba, it would be either very slow, or saying that the lan is busy, or cannot connect at all. then, in the samba, i'll see the log

...ou can make one (see https://wiki.ubuntu.com/X/MMIOTracing for a guide - should end up ~100MB uncompressed), please send a compressed one to mmio.dumps at gmail.com or make available some other way. On Tue, Feb 14, 2017 at 2:34 PM, Daniel Drake <drake at endlessm.com> wrote: > From: Chris Chiu <chiu at endlessm.com> > > This new graphics card was failing to initialize with nouveau due to > an "unknown chipset" error. > > Copy the GP106 configuration and rename for GP107/NV137. We don't > know for certain that this is fully correct, but brief desktop...

...kernel NULL pointer dereference at 0000000000000008" A second modprobe lustre command will then hang, again with no module loaded. Subsequently the client is not able to mount the lustre storage. Can anyone shed some light as to what has gone wrong here please? Many thanks. Regards, Peter Chiu STFC Rutherford Appleton Laboratory Space Science & Technology Department Building R25, Room 2.02 Chilton Didcot OXON OX11 0QX UK Phone: 01235-446699 Fax: 01235-445848 Email: peter.chiu at stfc.ac.uk Details: =========================================================== Client host cmi...

...with representative register unsigned reg = rep(mop.getReg()); mii->SetMachineOperandReg(i, reg); LiveInterval &RegInt = getInterval(reg); RegInt.weight += (mop.isUse() + mop.isDef()) * pow(10.0F, (int)loopDepth); -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://www.csie.nctu.edu.tw/~jwchiu>

2005/7/26, Chris Lattner <sabre at nondot.org>: > Tzu-Chien Chiu wrote: > > The same problem exists when there are two types of costant registers, > > floating point and integer, and each is declared 'packed' ([4xfloat] > > and [4xint]). The instruction selector doesn't know which instruction > > it should produce because the...

http://portal.acm.org/citation.cfm?id=75700 On 4/25/05, Chris Lattner <sabre at nondot.org> wrote: > On Sun, 24 Apr 2005, Tzu-Chien Chiu wrote: > > i'd like to know if there is any plan or existing work to add a Aho's > > trig language like code generator generator? > > Trig is a code generator generator? Is there any documentation for it > available anywhere? > > -Chris > > > ".....

...akes the implementing the instruction selector very diffifult. in this example, llvm.select() and llvm.sature() are encountered frist (bootm-up), but they must be 'remembered' and the instruction cannot be generated (BuildMI) until the opcode is known. Which one should I do? -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://www.csie.nctu.edu.tw/~jwchiu>

...// perform a final pass over the instructions and compute spill // weights, coalesce virtual registers and remove identity moves but the data structure LiveVariables::VirtRegInfo is _not_ updated. That is, VarInfo::DefInstr may point to an invalid (being coalesced) instruction. -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://www.csie.nctu.edu.tw/~jwchiu>

Actually the problems that Tzu-Chien Chiu are encountering are similar to what should be done for generating SSE code in the X86 backend and also other SIMD instruction sets. I think LLVM neeeds to add instructions for permuting components, extracting and injecting elements in packed types. If the architecture has instructions which can...

...header files in boost do not use fully-qualified tie(). I probably should not modify them. But my .cpp file #include them. I hope I could "using namespace" boost and llvm in .cpp file, because it's tedious to use fully-qualified identifiers in boost and llvm namespace. -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://www.csie.nctu.edu.tw/~jwchiu>

...y be stored in a constant register, and it's defined _before_ the program starts by API. For example: SetConstantValue( 5, Vector4( 1, 2, 3, 4 ); // C5 = <1,2,3,4> HANDLE handle = LoadCodeFromFile( filename ); SetCode( handle ); // C5 is referenced here Execute(); -- Tzu-Chien Chiu, 3D Graphics Hardware Enginner, <URL:http://www.csie.nctu.edu.tw/~jwchiu>

...ation libraries. at present i give me preferrence to "Prop": http://www.cs.nyu.edu/leunga/www/prop.html and it's portable too. are there any other good library you could recommend? On 4/25/05, Chris Lattner <sabre at nondot.org> wrote: > On Mon, 25 Apr 2005, Tzu-Chien Chiu wrote: > > http://portal.acm.org/citation.cfm?id=75700 > > Oh, tWig. :) Yes, tree pattern matching is exactly the direction we are > heading. We are slowly making the code generators more and more > automatically generated as time goes on. The SelectionDAG infrastructure >...

..., // 27 CMPfrraa, // 28 CMPfrrar, // 29 CMPfrrra, // 30 CMPfrrrr, // 31 Somewhere in my code, I have to write: unsigned opcode = MI->getOpcode(); // MachineInstr* if (CMPfaaaa == opcode || CMPfaaar == opcode || CMPfaara == opcode || ... -- Tzu-Chien Chiu - XGI Technology, Inc. URL: http://www.csie.nctu.edu.tw/~jwchiu/

...operands. I cannot distinguish between GeneralPurposeRC, INT_ReadOnlyRC, FP_ReadOnlyRC. But a correct register class is necessary for SSARegMap to create a virtual register. 2005/7/22, Misha Brukman <brukman at cs.uiuc.edu>: > On Fri, Jul 22, 2005 at 10:29:38AM +0800, Tzu-Chien Chiu wrote: > > I' have three set of registers - read-only regs, general purpose regs > > (read and write), and write-only regs. How should I partition them > > into different RegisterClasses so that I can easy define the > > instruction? > [snip] > > def MOV : Bin...