Displaying 20 results from an estimated 81309 matches for "ch".
2010 Oct 08
2
incorrect number of levels
...TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB
[101] TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB TB HI TB HI TB TB
[151] TB TB TB TB TB HI TB HI HI HI TB HI HI HI TB HI HI HI HI HI HI HI HI TB TB TB TB CH CH TB CH CH CH CH CH CH CH CH CH CH TB TB CH CH CH CH CH CH CH CH
[201] CH CH CH CH CH CH CH CH CH CH CH CH CH CH CH CH CH CH CH CH TB HI HI HI TB HI HI TB TB TB TB TB TB TB TB TB TB HI TB TB TB TB TB TB TB TB TB TB TB TB
[251] TB HI HI HI CH CH CH CH CH CH CH CH CH CH HI HI CH CH CH CH CH CH CH CH...
2006 Aug 26
0
DRbFire / ActiveRecord performances
...; => "garden2")
g.flowers << Flower.new("name" => "flower3", "color" => "color3")
g.save
end
class Server
def find(i)
Garden.find(i)
end
end
s = Server.new
g = s.find(1)
puts "#{g[:id]} | #{g[:name]}"
g.flowers.each do |f|
puts "#{f[:id]} | #{f[:garden_id]} | #{f[:name]}"
end
DRb.start_service(''drbfire://j20.attiksystem.ch:9000'', s, DRbFire::ROLE => DRbFire::SERVER)
DRb.thread.join
Client code:
------------
#!/usr/local/bin/ruby
require ''drb/drbfire''
DRb...
2018 Aug 07
2
limit sharing ability to certain users
Now the attributes are correctly read for the user test at onnet.ch <mailto:test at onnet.ch>, but other users are not able to authenticate anymore.
root at buserver:/var/spool/postfix/virtual/onnet.ch/test/Maildir/.super# doveadm user test at onnet.ch
field value
uid 5000
gid 5000
home /var/spool/postfix/virtual/onnet.ch/test/
mail maildir:~/Maildir
quota_r...
2018 Aug 07
0
limit sharing ability to certain users
...ap userdb, it should not have prevented
users from logging in.
What happens if you do
userdb {
? driver = passwd-file
? args = ....
? skip = notfound
? result_failure = continue-ok
}
Aki
On 07.08.2018 12:58, Simeon Ott wrote:
> Now the attributes are correctly read for the user test at onnet.ch
> <mailto:test at onnet.ch>, but other users are not able to authenticate
> anymore.
>
> root at buserver:/var/spool/postfix/virtual/onnet.ch/test/Maildir/.super#
> <http://onnet.ch/test/Maildir/.super#> doveadm user test at onnet.ch
> <mailto:test at onnet.ch>
&...
2018 Aug 07
2
limit sharing ability to certain users
? attached the dovecot -n, linked files, debug log lines during a standard client login
root at buserver:/etc/dovecot/conf.d# doveconf -n
# 2.2.13: /etc/dovecot/dovecot.conf
# OS: Linux 3.16.0-6-amd64 x86_64 Debian 8.11
auth_debug = yes
auth_debug_passwords = yes
auth_mechanisms = plain login
auth_verbose...
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
...ng this assert message on lib/CodeGen/LiveInterval.cpp:227:
"Range is not entirely in interval!"
I don't know yet if it's something that is missing on the backend code or
why
the range to be removed it outside the interval, does anyone have any clue?
A more detailed output is attached.
The program i tried to compile is :
test-suite/SingleSource/Benchmarks/Shootout/sieve.c
Cheers,
--
Bruno Cardoso Lopes
http://www.brunocardoso.org
"The Man in Black fled across the desert and the gunslinger followed"
- Childe Roland to the Dark Tower Came
-------------- next pa...
2017 Jul 20
3
Issue with DAG legalization of brcond, setcc, xor
Hi,
I am having some issues with how some of the instructions are being
legalized.
So this is my intial basic block. The area of concern is the last three
instructions. I will pick and choose debug output to keep this small.
SelectionDAG has 36 nodes:
t0: ch = EntryToken
t6: i32,ch = CopyFromReg t0, Register:i32 %vreg507
t2: i32,ch = CopyFromReg t0, Register:i32 %vreg17
t4: i32 = or t2, Constant:i32<256>
t9: i32 = shl t4, Consta...
2018 Aug 07
0
limit sharing ability to certain users
Ah. You probably need to change ldap userdb so that you add
userdb {
driver = ldap
? args = /etc/dovecot/dovecot-ldap.conf
result_success = continue-ok
}
so that the next one is processed.
you can use 'doveadm user test at onnet.ch' to verify that the attributes are read for this user, and with another usernam...
2017 Jul 21
4
Issue with DAG legalization of brcond, setcc, xor
...an Manatunga <manatunga at gmail.com>
> wrote:
>
>> Hi,
>>
>> I am having some issues with how some of the instructions are being
>> legalized.
>> So this is my intial basic block. The area of concern is the last three
>> instructions. I will pick and choose debug output to keep this small.
>>
>> SelectionDAG has 36 nodes:
>> t0: ch = EntryToken
>> t6: i32,ch = CopyFromReg t0, Register:i32 %vreg507
>> t2: i32,ch = CopyFromReg t0, Register:i32 %vreg17
>> t4: i32 = or t2, Const...
2009 Feb 06
1
DRM fills logs
...ifo_alloc:
initialised FIFO 1
Feb 6 06:32:18 selene kernel: [46866.525747] [drm] nouveau_fifo_free:
freeing fifo 1
And from here on forever, drm starts filling my logs (this is partial;
it dumps these messages at the rate of hundreds per second):
eb 6 06:32:18 selene kernel: 7] [drm] PFIFO_CACHE_ERROR - Ch1] [drm5]
[drm1] [drm] PFIFO_CACHE_ERROR - C5] [drm8] [drm]4] [drm]
PFIFO_CACHE_ERROR - Ch 38] [d2] [drm]8] [drm] PFIFO_CACHE_ERROR - Ch
312] [d6] [drm2] [drm] PFIFO_CACHE_ERROR - Ch6] [d9] [drm]5] [drm]
PFIFO_CACHE_ERROR - Ch9] [dr3] [drm9] [drm] PFIFO_CACHE_ERROR - Ch 3]
[dr6] [dr...
2017 Feb 14
2
Ensuring chain dependencies with expansion to libcalls
Hi all,
Our target does not have native support for 64-bit integers, so we rely on
library calls for certain operations (like sdiv). We recently ran into a
problem where these operations that are expanded to library calls aren't
maintaining the proper ordering in relation to other chains in the DAG.
The following snippet of a DAG demonstrates the problem.
t0: ch = EntryToken
t2: i64,ch,glue = CopyFromReg t0, Register:i64 %reg0
t4: i64,ch,glue = CopyFromReg t2:1, Register:i64 %reg1, t2:1
t6: i64,ch,glue = CopyFromReg t4:1, Register:i64 %reg2, t4:1
t8: i64,ch,glue = C...
2018 May 04
0
How to constraint instructions reordering from patterns?
Here is a last example to illustrate my concern.
The problem is about the lowering of node t13.
Initial selection DAG: BB#0 '_start:entry'
SelectionDAG has 44 nodes:
t11: i16 = Constant<0>
t0: ch = EntryToken
t3: ch = llvm.clp.set.rspa t0, TargetConstant:i16<392>, Constant:i32<64>
t5: ch = llvm.clp.set.rspb t3, TargetConstant:i16<393>, Constant:i32<64>
t8: ch = llvm.clp.set.rspsu t5, TargetConstant:i16<394>, Constant:i3...
2013 Apr 02
1
[LLVMdev] Promoting i1 to i32 does not work...
...onAction(ISD::SETCC, i1, Promote), but the i1 operands
didn't get promoted...I looked through the dump and it seems the i1
operands will be inserted after Initial selection DAG building, but
before Type-Legalization. So I wonder why they don't get promoted by
the Legalization Pass?!
I attached the shortened isel-dump, so if anyone could have a short look
on that I would be very thankful!
Jan
-------------- next part --------------
Initial selection DAG: BB#11 '_main:for.cond164.preheader'
SelectionDAG has 17 nodes:
0x1f34090: ch = EntryToken [ORD=161]
0x1f34090: <mul...
2016 Jun 22
2
LLVM Backend Issues
Thanks Anton and Krzysztof!
Here is the dump using the -debug flag. At this point I am not making much
sense of this, would it be too much to ask if one of you could walk me
through one of these lines?
One thing that I didn't point out is that I never defined any separate
floating point registers, not sure if this will pose any issue?
Thanks again for your time!
Jeff
jeff at ubuntu:~/code$ l...
2018 May 04
2
How to constraint instructions reordering from patterns?
...dev wrote:
> Here is a last example to illustrate my concern.
>
> The problem is about the lowering of node t13.
>
> Initial selection DAG: BB#0 '_start:entry'
>
> SelectionDAG has 44 nodes:
>
> t11: i16 = Constant<0>
>
> t0: ch = EntryToken
>
> t3: ch = llvm.clp.set.rspa t0, TargetConstant:i16<392>,
> Constant:i32<64>
>
> t5: ch = llvm.clp.set.rspb t3, TargetConstant:i16<393>, Constant:i32<64>
>
> t8: ch = llvm.clp.set.rspsu t5, TargetConstant:...
2018 May 04
2
How to constraint instructions reordering from patterns?
Hi,
Is there a kind of scope mechanism in the instruction lowering pattern language in order to control where instructions are inserted or how they are later reordered during the SelectionDiag linearization?
I know the glue chain that stick instructions together. But such mechanism in not provided in instruction lowering pattern.
I...
2014 Jul 31
0
Habiter ou investir sur le littoral atlantique
Si vous ne visualisez pas correctement l???e-mail, cliquez ici
<http://url.snd10.ch/visu-E9D92C62-F56A-4768-8594-94E7BC64B1C3-203221958-423876-31072014.html>
HABITER OU INVESTIR SUR LE LITTORAL ATLANTIQUE
<http://url.snd10.ch/url-203221958-1804885-31072014.html>
<http://url.snd10.ch/url-203221958-1804885-31072014.html>
a s??lectionn?? pour vous les meilleurs progra...
2014 Apr 08
0
Découvrez les nouveaux programmes du Grand Ouest
Si vous ne visualisez pas correctement l???e-mail, cliquez ici
<http://url.mp32.ch/visu-90BD7B44-1B18-42B2-BB27-BF4B02C4DE10-203221958-356307-08042014.html>
D??couvrez les nouveaux programmes immobiliers du Grand Ouest
<http://url.mp32.ch/url-203221958-1612521-08042014.html>
<http://url.mp32.ch/url-203221958-1612521-08042014.html>
a s??lectionn?? pour vous les mei...
2014 Apr 03
0
Retrouvez-nous au Salon de l'Immobilier avec les promoteurs de l'Ouest
Si vous ne visualisez pas correctement l???e-mail, cliquez ici
<http://url.mp32.ch/visu-C2035EE0-46EE-4FCF-9C8F-E48C8E5E008C-203221958-355072-03042014.html>
RETROUVEZ-NOUS AU SALON NATIONAL DE L'IMMOBILIER ?? PARIS
<http://url.mp32.ch/url-203221958-1607886-03042014.html>
<http://url.mp32.ch/url-203221958-1607887-03042014.html>
a s??lectionn?? pour vous les mei...
2018 May 04
0
How to constraint instructions reordering from patterns?
...dev wrote:
> Here is a last example to illustrate my concern.
>
> The problem is about the lowering of node t13.
>
> Initial selection DAG: BB#0 '_start:entry'
>
> SelectionDAG has 44 nodes:
>
> t11: i16 = Constant<0>
>
> t0: ch = EntryToken
>
> t3: ch = llvm.clp.set.rspa t0,
> TargetConstant:i16<392>, Constant:i32<64>
>
> t5: ch = llvm.clp.set.rspb t3, TargetConstant:i16<393>,
> Constant:i32<64>
>
> t8: ch = llvm.clp.set.rspsu t5, TargetCon...