search for: card_typ

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- drivers/gpu/drm/nouveau/nouveau_connector.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h b/drivers/gpu/drm/nouveau/nouveau_connector.h index 6e399aa..4cefce3 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.h +++ b/drivers/gpu/drm/nouveau/nouveau_connector.h @@ -107,7 +107,4

Hello everyone, I''m just trying to understand some logical reasons behind Rails syntax of "select" and "select_tag". I know I can do this: <%= form.select :card_type, supported_card_types, { :prompt => "Please Select..."} %> which sets a model field in the params hash. If I want to do the same for a non-model field, logic would dictate something like: <%= select :card_type, supported_card_types,...

...xed. The system always raises this error message : order is closed and here is my order.rb: class Order < ActiveRecord::Base include ActiveMerchant::Billing before_validation :set_status attr_protected :id, :customer_ip, :status, :error_message, :updated_at, :created_at attr_accessor :card_type, :card_number, :card_expiration_month, :card_expiration_year, :card_verification_value validates_size_of :order_items, :minimum => 1 validates_length_of :ship_to_first_name, :in => 2..255 validates_length_of :ship_to_last_name, :in => 2..255 validates_length_of :ship_to_address, :...

...the bo isn't in vram, and isn't tiled, we've got - * nothing to do here. + /* + * if the bo is not in vram, or remapping can be done (nv50+) + * do not worry about placement, any location is valid */ - if (bo->mem.mem_type != TTM_PL_VRAM) { - if (nv_device(drm->device)->card_type < NV_50 || - !nouveau_bo_tile_layout(nvbo)) - return 0; - } + if (nv_device(drm->device)->card_type >= NV_50 || + bo->mem.mem_type != TTM_PL_VRAM) + return 0; /* make sure bo is in mappable vram */ if (bo->mem.start + bo->mem.num_pages < mappable)

...u_display.c index 69688ef..fa0cf14 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -364,7 +364,9 @@ nouveau_vblank_enable(struct drm_device *dev, int crtc) { struct drm_nouveau_private *dev_priv = dev->dev_private; - if (dev_priv->card_type >= NV_50) + if (dev_priv->card_type >= NV_D0) + nv_mask(dev, 0x6100c0 + (crtc * 0x800), 0x5, 0x5); + else if (dev_priv->card_type >= NV_50) nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0, NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc)); else @@ -379,7 +381,9 @@ nouveau_vblank_disable...

...u32 tag_base; + struct nouveau_mm tags; struct nouveau_mm_node *tag_ram; }; @@ -117,10 +118,6 @@ nvc0_ltcg_init_tag_ram(struct nouveau_fb *pfb, struct nvc0_ltcg_priv *priv) u32 tag_size, tag_margin, tag_align; int ret; - nv_wr32(priv, 0x17e8d8, priv->part_nr); - if (nv_device(pfb)->card_type >= NV_E0) - nv_wr32(priv, 0x17e000, priv->part_nr); - /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */ priv->num_tags = (pfb->ram->size >> 17) / 4; if (priv->num_tags > (1 << 17)) @@ -152,7 +149,7 @@ nvc0_ltcg_init_tag_ram(struct nouveau_...

...o - * avoid corruption of other buffer objects. + * align to to that as well as the page size. Align the size to the + * appropriate boundaries. This does imply that sizes are rounded up + * 3-7 pages, so make sure your "special" buffer sizes are large enough. */ if (dev_priv->card_type == NV_50) { uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15; @@ -77,22 +78,20 @@ nouveau_bo_fixup_align(struct drm_device *dev, case 0x2800: case 0x4800: case 0x7a00: - *size = roundup(*size, block_size); if (is_power_of_2(block_size)) { - *size += 3 * block_size;...

...ptr; + + /* NV_PFIFO_CACHE1_GET actually goes to 0xffc before wrapping on my + * G80 chips, but CACHE1 isn't big enough for this much data.. Tests + * show that it wraps around to the start at GET=0x800.. No clue as to + * why.. + */ + ptr = (get & 0x7ff) >> 2; + + if (device->card_type < NV_40) { + mthd = nv_rd32(priv, NV04_PFIFO_CACHE1_METHOD(ptr)); + data = nv_rd32(priv, NV04_PFIFO_CACHE1_DATA(ptr)); + } else { + mthd = nv_rd32(priv, NV40_PFIFO_CACHE1_METHOD(ptr)); + data = nv_rd32(priv, NV40_PFIFO_CACHE1_DATA(ptr)); + } + + if (!nv04_fifo_swmthd(priv, chid, mthd, data)...

...vice = nv_device(drm->device); - u32 mappable = pci_resource_len(device->pdev, 1) >> PAGE_SHIFT; - - /* as long as the bo isn't in vram, and isn't tiled, we've got - * nothing to do here. - */ - if (bo->mem.mem_type != TTM_PL_VRAM) { - if (nv_device(drm->device)->card_type < NV_50 || - !nouveau_bo_tile_layout(nvbo)) - return 0; - } - - /* make sure bo is in mappable vram */ - if (bo->mem.start + bo->mem.num_pages < mappable) - return 0; - - - nvbo->placement.fpfn = 0; - nvbo->placement.lpfn = mappable; - nouveau_bo_placement_set(nvbo, TTM_P...

...x.php?page=Asterisk+ss7+setup I have the cross over cable between them. however, wanpipe shows connected but the signaling link does not align. i have my configs for host A ##wanpipe1.conf [devices] wanpipe1 = WAN_AFT_TE1, Comment [interfaces] w1g1 = wanpipe1, , TDM_VOICE, Comment [wanpipe1] CARD_TYPE = AFT S514CPU = A CommPort = PRI AUTO_PCISLOT = NO PCISLOT = 4 PCIBUS = 15 FE_MEDIA = E1 FE_LCODE = HDB3 FE_FRAME = NCRC4 FE_LINE = 1 TE_CLOCK = MASTER TE_REF_CLOCK = 0 TE_HIGHIMPEDANCE = NO LBO = 12...

...th_numbers => false, :discard_day => true, :include_blank => false) %></p> ActiveRecord::MultiparameterAssignmentErrors in AccountController#signup_unlimited Parameters: {"user"=>{"company_name"=>"", "card_type"=>"Mastercard", "password_confirmation"=>"", "card_number"=>"", "card_expiration(1i)"=>"2008", "first_name"=>"", "card_expiration(2i)"=>"2", "last_name&qu...

...k; + if (!node->memtype) + /* untiled */ + break; + /* fallthrough, tiled memory */ case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; mem->bus.base = pci_resource_start(dev->pdev, 1); mem->bus.is_iomem = true; if (nv_device(drm->device)->card_type >= NV_50) { struct nouveau_bar *bar = nouveau_bar(drm->device); - struct nouveau_mem *node = mem->mm_node; ret = bar->umap(bar, node, NV_MEM_ACCESS_RW, &node->bar_vma); @@ -1324,6 +1327,7 @@ nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo) struc...

...my credit_card class looks like this.... class CreditCard include ActiveModel::Validations include ActiveModel::AttributeMethods include ActiveModel::Callbacks include ActiveModel::Conversion extend ActiveModel::Naming # belongs_to :user attr_accessor :card_type, :card_number, :card_verification, :card_expires_on, :agree validates :card_type, :card_number, :card_verification, :card_expires_on, :agree, :presence => true def initialize(attributes = {}) expire_date = {} #raise attributes.inspect attributes.each do |name, v...

...m.c 2013-12-08 17:18:58.000000000 +0100 +++ linux-3.12.4/drivers/gpu/drm/nouveau/nouveau_drm.c 2013-12-15 16:37:25.000000000 +0100 @@ -180,7 +180,7 @@ nouveau_accel_init(struct nouveau_drm *d else if (device->chipset < 0x17) ret = nv10_fence_create(drm); else if (device->card_type < NV_50) ret = nv17_fence_create(drm); else if (device->chipset < 0x84) ret = nv50_fence_create(drm); - else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); + else if (device->card_type < NV_C0) ret = nv50_fence_create(drm); else...

.../* >> + * if the bo is not in vram, or remapping can be done (nv50+) >> + * do not worry about placement, any location is valid >> */ >> - if (bo->mem.mem_type != TTM_PL_VRAM) { >> - if (nv_device(drm->device)->card_type < NV_50 || >> - !nouveau_bo_tile_layout(nvbo)) >> - return 0; >> - } >> + if (nv_device(drm->device)->card_type >= NV_50 || >> + bo->mem.mem_type != TTM_PL_VRAM) >> + retu...

...u32 tag_base; + struct nouveau_mm tags; struct nouveau_mm_node *tag_ram; }; @@ -117,10 +118,6 @@ nvc0_ltcg_init_tag_ram(struct nouveau_fb *pfb, struct nvc0_ltcg_priv *priv) u32 tag_size, tag_margin, tag_align; int ret; - nv_wr32(priv, 0x17e8d8, priv->part_nr); - if (nv_device(pfb)->card_type >= NV_E0) - nv_wr32(priv, 0x17e000, priv->part_nr); - /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */ priv->num_tags = (pfb->ram->size >> 17) / 4; if (priv->num_tags > (1 << 17)) @@ -142,7 +139,7 @@ nvc0_ltcg_init_tag_ram(struct nouveau_...

...ESET)) { - ret = nouveau_bios_init(dev); - if (ret) - goto out; - } + ret = nouveau_bios_init(dev); + if (ret) + goto out; ret = nouveau_gpuobj_early_init(dev); if (ret) @@ -456,14 +454,12 @@ goto out_irq; } - if (drm_core_check_feature(dev, DRIVER_MODESET)) { - if (dev_priv->card_type >= NV_50) - ret = nv50_display_create(dev); - else - ret = nv04_display_create(dev); - if (ret) - goto out_irq; - } + if (dev_priv->card_type >= NV_50) + ret = nv50_display_create(dev); + else + ret = nv04_display_create(dev); + if (ret) + goto out_irq; ret = nouveau_backli...

...au/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -1249,7 +1249,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) mem->bus.is_iomem = !dev->agp->cant_use_aperture; } #endif - if (!node->memtype) + if (nv_device(drm->device)->card_type < NV_50 || !node->memtype) /* untiled */ break; /* fallthrough, tiled memory */ -- 1.8.3.2

.../gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c @@ -414,7 +414,14 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data, init->subchan[0].grclass = 0x0039; else init->subchan[0].grclass = 0x5039; - init->nr_subchan = 1; + if (dev_priv->card_type >= NV_50) { + init->subchan[1].handle = NvSw; + init->subchan[1].grclass = NV50_NVSW; + } + if (dev_priv->card_type < NV_50) + init->nr_subchan = 1; + else + init->nr_subchan = 2; /* Named memory object area */ ret = drm_gem_handle_create(file_priv, chan->notifier...

Hi, this is continuation for the MMIO accessor rewrite and cleanup. I am currently running nv28 with these patches applied, but I cannot test on PPC. Please, review and comment. If the direction is good, I'll do the same to INSTANCE_{RD,WR} as I did for nv_{rd,wr}32, and change PRAMIN from drm_local_map to simple ioremap. Can the same be done for channel specific mappings, that is