search for: brinds

Displaying 20 results from an estimated 21 matches for "brinds".

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2006 Aug 02
1
[LLVMdev] adding an optional flag edge to a BRIND node
Is there any way to add an optional flag edge to a BRIND node? I In the ARM backend I lower returns directly to BRINDs, so I need to add an edge connecting the BRIND and the CopyToReg that sets the return value. The other option is to create an ARM specific node that is identical to BRIND except for having a flag edge. Thanks, Rafael
2006 May 31
0
[LLVMdev] [RFC, ARM] expanding RET to CopyToReg;BRIND
On Wed, 31 May 2006, [UTF-8] Rafael Esp?ndola wrote: >> We don't want the copy and shift to wander apart from each other (e.g. we >> don't want another shift to get scheduled in between them), so we flag >> them together. In practice, these copies usually get coallesced away. > In the second case shl explicitly uses CL. Shouldn't the register > allocator be
2006 May 31
2
[LLVMdev] [RFC, ARM] expanding RET to CopyToReg;BRIND
> > Why it is named RETFLAG? > > Historical reason. Originally we didn't have nodes that could > *optionally* have an input flag. A better design, e.g. on PPC would be to > have a PPCISD::RET node, which takes an optional input flag, and always > lower RET to it. I See. I will try to always lower to "(mov)*;bx lr" on ARM. > Flag in the SelectionDAG stuff is
2006 May 30
2
[LLVMdev] [RFC, ARM] expanding RET to CopyToReg;BRIND
I have changed the way in which the ARM backend generates a function return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch is attached. In my opinion the resulting code is easier to understand, but I have some questions: Why all backends use RETFLAG? Why it is named RETFLAG? Why the Copy that places the
2006 May 31
1
[LLVMdev] [RFC, ARM] expanding RET to CopyToReg;BRIND
On 5/31/06, Chris Lattner <sabre at nondot.org> wrote: > On Wed, 31 May 2006, [UTF-8] Rafael Esp?ndola wrote: > >> We don't want the copy and shift to wander apart from each other (e.g. we > >> don't want another shift to get scheduled in between them), so we flag > >> them together. In practice, these copies usually get coallesced away. > > In
2006 May 30
0
[LLVMdev] [RFC, ARM] expanding RET to CopyToReg;BRIND
On Tue, 30 May 2006, [UTF-8] Rafael Esp?ndola wrote: > I have changed the way in which the ARM backend generates a function > return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now > expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch > is attached. Ok, I haven't looked at the code, but you're free to do whatever make sense. > In my
2009 Jul 23
2
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Tue, Jul 14, 2009 at 6:48 PM, Bob Wilson <bob.wilson at apple.com> wrote: > > On Jul 2, 2009, at 10:48 AM, robert muth wrote: > > I spend over a day trying to follow your suggestion. In the end I was not > successful. Here is what Iearned: > > After setting > > ARMJITInfo::hasCustomJumpTables -> true > setOperationAction for ISD::BR_JT -> Expand >
2009 Jul 27
0
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Jul 23, 2009, at 12:10 PM, robert muth wrote: > Bob: > > Thanks for cleaning this up. I like the new patch much better than > the old one. > Teaching the (abstract) ConstantValue class about jumptable indices > is a little > bit ugly but I do not see any better solution without massive > refactoring. > I have added TODOs here and elsewhere and plan to address
2011 Mar 31
1
[LLVMdev] indirectbr implementation for Alpha backend
Hi, I encountered an error while trying to use the indirectbr instruction with Alpha backend (current build). Here's part of the code sequence that I tried to compile: bb1: %1 = load i32* %i, align 4 %2 = add nsw i32 %1, 1 store i32 %2, i32* %i, align 4 indirectbr i8* blockaddress(@main, %bb1), [ label %bb1 ] br label %return This compiles correctly when I use the X86 or PPC
2006 Oct 19
1
[LLVMdev] jump table x constant pool
I had some problems adding the address of a jump table to the constant pool. The problem is that the address of a jump table is not a GlobalValue.Currently I decided to expand BRIND so that I can work on simpler problems :-) A small brain dump on the issue: GlobalValues are currently used to represent functions and global variables. Maybe we could also use then for anything that will have a label
2009 Jul 14
0
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Jul 2, 2009, at 10:48 AM, robert muth wrote: > I spend over a day trying to follow your suggestion. In the end I > was not successful. Here is what Iearned: > > After setting > > ARMJITInfo::hasCustomJumpTables -> true > setOperationAction for ISD::BR_JT -> Expand > > I needed to add a "brind" definition to ARMInstrInfo.td > I picked
2013 Aug 22
0
[LLVMdev] [cfe-dev] [RFC PATCH] X32 ABI support for Clang/compiler-rt
On Thu, 2013-08-22 at 11:29 +0400, Alexey Samsonov wrote: > Ah, I've replied in a different thread already. What Dmitri says - If > you're interesting in only building the Clang on x32 host, you may avoid > checking out compiler-rt repo for now. > > compiler-rt does make a convenient compiler test though.. :) fatal error: error in backend: Cannot select: 0x30ccf38: ch =
2009 Jul 02
2
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Thu, Jun 25, 2009 at 6:17 PM, Bob Wilson <bob.wilson at apple.com> wrote: > Hi Robert, > Evan asked me to review this patch, and I have some questions about it. I > apologize for not following the discussion earlier and for hitting you with > questions after you've already gone through several revisions. > > LLVM provides some default behavior for handling jump
2013 Aug 22
2
[LLVMdev] [cfe-dev] [RFC PATCH] X32 ABI support for Clang/compiler-rt
Ah, I've replied in a different thread already. What Dmitri says - If you're interesting in only building the Clang on x32 host, you may avoid checking out compiler-rt repo for now. On Thu, Aug 22, 2013 at 10:59 AM, Dmitri Gribenko <gribozavr at gmail.com>wrote: > On Wed, Aug 21, 2013 at 11:04 PM, Steven Newbury <steve at snewbury.org.uk> > wrote: > > I've
2023 Jun 30
0
Mantenimiento
MANTENIMIENTO: Predictivo, Preventivo y Correctivo M?todos Pr?cticos y Estrat?gicos Reciba un c?lido saludo, Estimado usuario, reciba mi cordial invitaci?n a participar en este seminario internacional sobre Mantenimiento: Predictivo, Preventivo y Correctivo. Este seminario se llevar? a cabo el d?a 26 de julio de manera Online en Vivo brind?ndole las estrategias en mantenimiento avanzadas,
2006 Aug 03
1
[LLVMdev] need some help to remove a dummy mov
I have just added a retflag to the ARM backend. I thought that using BRIND directly was to blame for a dummy move. But I the move wasn't removed. When compiling --------------------------------------- int %g() { entry: call void %f( ) ret int 42 } declare void %f() -------------------------------------- The ARM backend produces ------------------------------------------- g:
2009 Apr 16
3
Digitizing the Plot
Hi R, Wanted to check if there are any packages available for getting the (x,y) data points of a graph or a plot, which is in the image format. Say, the plot could be a published report, and I want to get the points of the curve plotted. (I am speaking something related the subject discussed in http://www.uniphiz.com/digitizing.htm) Thanks, Shubha This e-mail may contain
2012 Apr 07
0
Resumen de R-help-es, Vol 38, Envío 13
2012/4/7 <r-help-es-request@r-project.org> > Envíe los mensajes para la lista R-help-es a > r-help-es@r-project.org > > Para subscribirse o anular su subscripción a través de la WEB > https://stat.ethz.ch/mailman/listinfo/r-help-es > > O por correo electrónico, enviando un mensaje con el texto "help" en > el asunto (subject) o en el cuerpo a:
2011 Dec 05
3
[LLVMdev] Dead register (was Re: [llvm-commits] [llvm] r145819)
RegScavenger is complaining about use of an undefined register, CTR8, in the BCTR8 instruction, in the following instance (this is from the PPC backend): BB#38: derived from LLVM BB %for.end50 Predecessors according to CFG: BB#36 %X3<def> = LD 0, <fi#27>; mem:LD8[FixedStack27] %X4<def> = RLDICR %X3<kill>, 3, 60 %X5<def> = LI8
2009 Jun 25
0
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
Hi Robert, Evan asked me to review this patch, and I have some questions about it. I apologize for not following the discussion earlier and for hitting you with questions after you've already gone through several revisions. LLVM provides some default behavior for handling jump tables, with the tables emitted separately from the code that uses them. The ARM backend provides its