search for: brind

Is there any way to add an optional flag edge to a BRIND node? I In the ARM backend I lower returns directly to BRINDs, so I need to add an edge connecting the BRIND and the CopyToReg that sets the return value. The other option is to create an ARM specific node that is identical to BRIND except for having a flag edge. Thanks, Rafael

...dence dag. We do this with a flag edge. > In the first case, what do you think about making it possible for an > instruction to optionally depend on a value? That is, make blr depend > on R3 or R3/R4 depending on the type of the return value. Something > like > a = DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR); > a.addUse(PPC::R3) You can play games like that, but I wouldn't suggest it. It's better to just force the copy to be inserted in the right place. When the register allocator runs, it does know about register lifetimes and other constraints, and knows that R...

...avoid scheduling an instruction that destroys CL in between them? In the first case, what do you think about making it possible for an instruction to optionally depend on a value? That is, make blr depend on R3 or R3/R4 depending on the type of the return value. Something like a = DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR); a.addUse(PPC::R3) > -Chris Thanks, Rafael

I have changed the way in which the ARM backend generates a function return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch is attached. In my opinion the resulting code is easier to understand, but I have some questions: Why all backends use RETFLAG? Why it is named RETFLAG? Why the Copy that places the result must have a Flag operand? If I understand correctly, the Flag...

...er one uses it. > > In the first case, what do you think about making it possible for an > > instruction to optionally depend on a value? That is, make blr depend > > on R3 or R3/R4 depending on the type of the return value. Something > > like > > a = DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR); > > a.addUse(PPC::R3) > > You can play games like that, but I wouldn't suggest it. It's better to > just force the copy to be inserted in the right place. When the register > allocator runs, it does know about register lifetimes and other > con...

On Tue, 30 May 2006, [UTF-8] Rafael Esp?ndola wrote: > I have changed the way in which the ARM backend generates a function > return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now > expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch > is attached. Ok, I haven't looked at the code, but you're free to do whatever make sense. > In my opinion the resulting code is easier to understand, but I have > some questions: > > Why all backends use RETFLAG? The backends...

...t muth wrote: > > I spend over a day trying to follow your suggestion. In the end I was not > successful. Here is what Iearned: > > After setting > > ARMJITInfo::hasCustomJumpTables -> true > setOperationAction for ISD::BR_JT -> Expand > > I needed to add a "brind" definition to ARMInstrInfo.td > I picked "bx" but to do a proper job one would have to take older > architectures > into account.. > The next thing was to to set > setOperationAction for ISD::JumpTable -> Custom > and implement the corresponding code. > This...

...point in just moving one of them out to a separate function with a big name. As I wrote before, there are a few things that need to be addressed before we can take the patch. I'll repeat them here for clarity: * It needs to work on Thumb and Thumb2. I'm not even sure if the "brind" pattern I added is the right thing for ARM mode. * The JIT code emitter is definitely broken with this. Unless there is a fundamental reason why this is hard, it should be fixed. * The testcase should use the new FileCheck format. (I think I phrased this as a suggestion before, but up...

...en I use the X86 or PPC backend, but results in the following error with Alpha backend: LLVM ERROR: Cannot select: 0x95a0490: i64 = BlockAddress<@main, %bb1> [ID=3] I also found the following line commented out in the file lib/Target/Alpha/AlphaISelLowering.cpp: // setOperationAction(ISD::BRIND, MVT::Other, Expand); My guess is that indirectbr is not implemented for Alpha. If that's the case, where do I need to make changes to implement this instruction? Thank you, Giang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm....

I had some problems adding the address of a jump table to the constant pool. The problem is that the address of a jump table is not a GlobalValue.Currently I decided to expand BRIND so that I can work on simpler problems :-) A small brain dump on the issue: GlobalValues are currently used to represent functions and global variables. Maybe we could also use then for anything that will have a label in the final assembly: functions, global variables, basic blocks, jump tables an...

...bert muth wrote: > I spend over a day trying to follow your suggestion. In the end I > was not successful. Here is what Iearned: > > After setting > > ARMJITInfo::hasCustomJumpTables -> true > setOperationAction for ISD::BR_JT -> Expand > > I needed to add a "brind" definition to ARMInstrInfo.td > I picked "bx" but to do a proper job one would have to take older > architectures > into account.. > The next thing was to to set > setOperationAction for ISD::JumpTable -> Custom > and implement the corresponding code. > Th...

...thread already. What Dmitri says - If > you're interesting in only building the Clang on x32 host, you may avoid > checking out compiler-rt repo for now. > > compiler-rt does make a convenient compiler test though.. :) fatal error: error in backend: Cannot select: 0x30ccf38: ch = brind 0x30cccf8:1, 0x30cc368 [ORD=109] [ID=11] 0x30cc368: i32 = add 0x30cccf8, 0x30cc518 [ORD=109] [ID=10] 0x30cccf8: i32,ch = load 0x30cc2d8:1, 0x30ccfc8, 0x30cc6c8<LD4[JumpTable]> [ORD=109] [ID=9] 0x30ccfc8: i32 = add 0x30cc5a8, 0x30cc518 [ORD=109] [ID=8] 0x30cc5a8: i32 = shl...

...consider implementing it using the LLVM > defaults? > I spend over a day trying to follow your suggestion. In the end I was not successful. Here is what Iearned: After setting ARMJITInfo::hasCustomJumpTables -> true setOperationAction for ISD::BR_JT -> Expand I needed to add a "brind" definition to ARMInstrInfo.td I picked "bx" but to do a proper job one would have to take older architectures into account.. The next thing was to to set setOperationAction for ISD::JumpTable -> Custom and implement the corresponding code. This code is very similar to my "o...

Ah, I've replied in a different thread already. What Dmitri says - If you're interesting in only building the Clang on x32 host, you may avoid checking out compiler-rt repo for now. On Thu, Aug 22, 2013 at 10:59 AM, Dmitri Gribenko <gribozavr at gmail.com>wrote: > On Wed, Aug 21, 2013 at 11:04 PM, Steven Newbury <steve at snewbury.org.uk> > wrote: > > I've

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I have just added a retflag to the ARM backend. I thought that using BRIND directly was to blame for a dummy move. But I the move wasn't removed. When compiling --------------------------------------- int %g() { entry: call void %f( ) ret int 42 } declare void %f() -------------------------------------- The ARM backend produces ---------------------...

Hi R, Wanted to check if there are any packages available for getting the (x,y) data points of a graph or a plot, which is in the image format. Say, the plot could be a published report, and I want to get the points of the curve plotted. (I am speaking something related the subject discussed in http://www.uniphiz.com/digitizing.htm) Thanks, Shubha This e-mail may contain

...espondiendo. > > Asuntos del día: > > 1. grafica modelo logit y probit (sofia andrea ospina valencia) > 2. Re: grafica modelo logit y probit (Carlos Ortega) > Hola Sofía: no he seguido toda la línea de tu pregunta así que disculpame si la información que te brinde no sea la adecuada o la respuesta a tu pregunta la haya dado otro usuario. Si te fijás en el libro: "Extending the linear model with R" de Julian Faraway en la página 31, en el famoso ejemplo del challenger. Utiliza la sentencia: #paquete faraway plot(damage/6 ~ temp, o...

...BB#9 BB#10 BB#11 BB#25 BB#12 BB#16 BB#18 BB#13 BB#17 How could CRT8 be marked implicitly-defined and also dead in the same instruction when it is clearly used in the next instruction? The code that inserts these instructions is in SDNode *PPCDAGToDAGISel::Select(SDNode *N) and reads: case ISD::BRIND: { // FIXME: Should custom lower this. SDValue Chain = N->getOperand(0); SDValue Target = N->getOperand(1); unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; unsigned Reg = Target.getValueType() == MVT::i32 ? PPC::BCTR : PPC::BCTR8; Chain = S...

Hi Robert, Evan asked me to review this patch, and I have some questions about it. I apologize for not following the discussion earlier and for hitting you with questions after you've already gone through several revisions. LLVM provides some default behavior for handling jump tables, with the tables emitted separately from the code that uses them. The ARM backend provides its