Displaying 20 results from an estimated 38 matches for "bregs".
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2006 May 06
2
can''t find a register in class `BREG'' while reloading `asm''
Hi List-
I''m brand new to xen but an old hand with Linux.
With a fresh, clean, Gentoo installation on this box, I''m attempting to
install xen using the gentoo-standard:
emerge xen
but the process is failing with an error that''s very similar to one
reported by another user (A Streetcar Named: see
2007 Feb 11
1
syslinux-3.36 nopie patch
I made a patch that depending of gcc flavor add -no-pie or -nopie on
libutil and dos Makefile.
This fix fatal error like this
sha1hash.c: In function `SHA1Transform':
../include/netinet/in.h:24: error: can't find a register in class `BREG'
while reloading `asm'
../include/netinet/in.h:24: error: can't find a register in class `BREG'
while reloading `asm'
2011 Dec 09
1
[PATCH] Fix compilation when gcc is patched to default to -fPIE -Wl, -pie
gcc hardened by default is seen on gentoo, alt-linux, HLFS, etc.
Patch fix on syslinux this error during gpxe compilation:
[BUILD] bin/cpu.o
arch/i386/core/cpu.c: In function 'get_cpuinfo':
arch/i386/include/bits/cpu.h:79: error: can't find a register in class 'BREG' while reloading 'asm'
arch/i386/include/bits/cpu.h:79: error: can't find a register in class
2013 Oct 04
1
[LLVMdev] ADDE to use branch registers
Hi,
I am working on a LLVM backend that has eight different branch registers. I am having a lot of trouble with implementing the following instructions:
addcg $r0.1, $b0.0 = $r0.1, $r0.1, $b0.0
(r is a general purpose register and b is a 1 bit branch register) The branch register is used for carry in and carry out.
I have noticed that this instruction is very closely related to the ADDE
2011 Dec 06
4
Last call for 4.05
I'm going to try to push 4.05 out this week, so please holler if there
is anything critical missing.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
2004 Apr 05
3
Selecting Best Regression Equation
Dear all,
Does R or S-plus or any of their packages provide any command to form any
of the following procedures to find Best Regression Equation -
1. 'All Possible Regressions Procedures' (is there any automated command
to perform 2^p regressions and ordering according to criteria R2(adj),
mallows Cp, s2- by not setting all the regression models manually),
2. 'Backward
2016 Feb 01
2
TableGen customized node with mayStore attribute is deleted if there is no use
...implementation is wrong.
def MoveTy : SDTypeProfile<1, 1, []>;
def MoveFlag : SDNode<"FOOISD::MOVE_FLAG", MoveTy, [SDNPHasChain,
SDNPSideEffect, SDNPMayStore, SDNPMayLoad]>;
let hasSideEffects = 1, mayStore = 1, mayLoad = 1 in {
def MOVE : InstFOO<(outs ARegs:$dst), (ins BRegs:$src),
"move $dst, $src",
[(set i32:$dst, (MoveFlag i32:$src))]>;
For example, I add this node into SDAG when I want to move the formal
argument from the specific register class to other register class. I
implement it in LowerFormalArguments()...
2010 Jul 18
2
Problem With Steam
Hello,
I installed Steam with winetricks (i installed vcrun2005 and corefonts before).
The update succeeded and when i launch the game, after to log in (user and password) Steam stop alone.
When i launch in the console, i have this :
Code:
wine "/home/berillions/wine/Steam/drive_c/Program Files/Steam/Steam.exe"
fixme:process:SetProcessShutdownParameters (00000100, 00000000): partial
2008 Dec 12
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 2
This patch set is intended for the next merge window. They are just
enhancements of the already merged patches or ia64 porting from x86
paravirt techniques and that their quality is enough for merge.
This patch set is for binary patch optimization for paravirt_ops.
The binary patch optimization is important on native case because
the paravirt_ops overhead can be reduced by converting indirect
2008 Dec 12
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 2
This patch set is intended for the next merge window. They are just
enhancements of the already merged patches or ia64 porting from x86
paravirt techniques and that their quality is enough for merge.
This patch set is for binary patch optimization for paravirt_ops.
The binary patch optimization is important on native case because
the paravirt_ops overhead can be reduced by converting indirect
2008 Dec 22
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 3
This patch set is intended for the next merge window. They are just
enhancements of the already merged patches or ia64 porting from x86
paravirt techniques and that their quality is enough for merge.
This patch set is for binary patch optimization for paravirt_ops which
depends on the patch series I sent out, ia64/pv_ops, xen:
more paravirtualization.
The binary patch optimization is important on
2008 Dec 22
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 3
This patch set is intended for the next merge window. They are just
enhancements of the already merged patches or ia64 porting from x86
paravirt techniques and that their quality is enough for merge.
This patch set is for binary patch optimization for paravirt_ops which
depends on the patch series I sent out, ia64/pv_ops, xen:
more paravirtualization.
The binary patch optimization is important on
2009 Mar 04
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 4
This patch set is for the next merge window.
They are just enhancements of the already merged patches or ia64 porting
from x86 paravirt techniques and that their quality is enough for merge.
This patch set is for binary patch optimization for paravirt_ops which
depends on the patch series I sent out, ia64/pv_ops, xen:
more paravirtualization.
The binary patch optimization is important on native
2009 Mar 04
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 4
This patch set is for the next merge window.
They are just enhancements of the already merged patches or ia64 porting
from x86 paravirt techniques and that their quality is enough for merge.
This patch set is for binary patch optimization for paravirt_ops which
depends on the patch series I sent out, ia64/pv_ops, xen:
more paravirtualization.
The binary patch optimization is important on native
2008 Nov 25
6
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization
This patch set is for binary patch optimization for paravirt_ops.
The binary patch optimization is important on native case because
the paravirt_ops overhead can be reduced by converting indirect
call into in-place execution or direct call.
The first patch imports helper functions which themselves doesn't interesting
things.
The second patch replaces the indirect function calls with a
2008 Nov 25
6
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization
This patch set is for binary patch optimization for paravirt_ops.
The binary patch optimization is important on native case because
the paravirt_ops overhead can be reduced by converting indirect
call into in-place execution or direct call.
The first patch imports helper functions which themselves doesn't interesting
things.
The second patch replaces the indirect function calls with a
2014 Sep 02
2
[LLVMdev] Instruction Selection sanity check
Hi,
I am working on a new back-end for LLVM. This architecture has two register
types, data(A) and accumulator(B).
A registers are i32 where as B registers are i64. This is causing me some
headaches, as far as I can tell, it's not really possible to mix the two
using tablegen?
In the hardware, every instruction can either take an A register or a B
register, in tablegen (as far as I can
2011 Sep 14
2
Hard Reset Demo doesn't render textures
I've tried to run demo of Hard Reset and it has two big problems on Wine. First is that mouse isn't working. You get input only from keyboard but that can be solved with raw input patch. I used the one that is working with Deus Ex: Human Revolution:
http://dl.dropbox.com/u/6901628/raw2.patch
but second is much worse. Basically almost all of the textures aren't rendered. It starts
2010 Sep 05
1
Memory.dll.??0MemoryPoolObj@@QAE@PBDW4MEMPOOLTYPE@@I@Z
I get the following output when I start Warhammer 40K :
xavier at xavier-pc /wine/warhammer1/drive_c/jeu $ wine WinterAssault.exe
fixme:advapi:SetEntriesInAclA 1 0x33f7c4 (nil) 0x33f80c
fixme:advapi:SetSecurityInfo stub
fixme:dpnhpast:DllRegisterServer :stub
wine: Call from 0x7ef93900 to unimplemented function Memory.dll.??0MemoryPoolObj@@QAE at PBDW4MEMPOOLTYPE@@I at Z, aborting
2017 Sep 06
4
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
On Wed, Sep 6, 2017 at 10:01 AM, David Blaikie <dblaikie at gmail.com> wrote:
> On Tue, Sep 5, 2017 at 1:00 PM Reid Kleckner via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> LLVM SSA values obviously do not have an address that we can take and
>> they don’t live in registers, so neither the default memory location model
>> nor DW_OP_regN make sense