search for: boot_cpu_data

...t identify_cpu(struct cpuinfo_x86 *c) { int i; @@ -486,30 +486,43 @@ void __cpuinit identify_cpu(struct cpuin for (i = 0; i < NCAPINTS; i++) printk(" %08lx", c->x86_capability[i]); printk("\n"); - +} + +void __init identify_boot_cpu(void) +{ + identify_cpu(&boot_cpu_data); + + /* Init Machine Check Exception if available. */ + mcheck_init(&boot_cpu_data); + + sysenter_setup(); + enable_sep_cpu(); + + mtrr_bp_init(); +} + +void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) +{ + int i; + + BUG_ON(c == &boot_cpu_data); + identify_cpu(c); /* * On...

...t identify_cpu(struct cpuinfo_x86 *c) { int i; @@ -486,30 +486,43 @@ void __cpuinit identify_cpu(struct cpuin for (i = 0; i < NCAPINTS; i++) printk(" %08lx", c->x86_capability[i]); printk("\n"); - +} + +void __init identify_boot_cpu(void) +{ + identify_cpu(&boot_cpu_data); + + /* Init Machine Check Exception if available. */ + mcheck_init(&boot_cpu_data); + + sysenter_setup(); + enable_sep_cpu(); + + mtrr_bp_init(); +} + +void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) +{ + int i; + + BUG_ON(c == &boot_cpu_data); + identify_cpu(c); /* * On...

https://access.redhat.com/support/policy/intel shows mainly Xeon CPUs. What about Intel Core i7-6700 Quad-Core Skylake has the current EL6 variant support for it? Any experience? Feedback would be greatly appreciated. Thanks, LF

Hi Andi, Four patches: - clean up asm/bugs.h, by moving all the C code into its own C file - split identify_cpu() into boot and secondary variants, so that boot-time setup functions can be marked __init - repost of the COMPAT_VDSO patches with a bit more robustness from unknown DT_tags, and functions marked __init, since all this is boot-time only setup. Thanks, J --

Hi Andi, Four patches: - clean up asm/bugs.h, by moving all the C code into its own C file - split identify_cpu() into boot and secondary variants, so that boot-time setup functions can be marked __init - repost of the COMPAT_VDSO patches with a bit more robustness from unknown DT_tags, and functions marked __init, since all this is boot-time only setup. Thanks, J --

...; >> Intel Core i7-6700 Quad-Core Skylake >> >> has the current EL6 variant support for it? >> >> Any experience? Feedback would be greatly appreciated. > > > I found this > > linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c > > 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && > 797 ((boot_cpu_data.x86 == 6))) { > 798 switch (boot_cpu_data.x86_model) { > 799 case 94: /* Skylake-S */ > 800 case 86: /* Broadwell-DE SoC */ > 801 case 85: /* Purley */ > 802 case 79: /...

...ntel > > shows mainly Xeon CPUs. What about > > Intel Core i7-6700 Quad-Core Skylake > > has the current EL6 variant support for it? > > Any experience? Feedback would be greatly appreciated. I found this linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && 797 ((boot_cpu_data.x86 == 6))) { 798 switch (boot_cpu_data.x86_model) { 799 case 94: /* Skylake-S */ 800 case 86: /* Broadwell-DE SoC */ 801 case 85: /* Purley */ 802 case 79: /* Broadwell-EP and EX */...

...profile: found i386/core_i7. If I boot the same compiled kernel, without Xen installed, dmesg | grep PMU shows : Performance Events : Nehalem/Corei7 events, Intel PMU driver. PMU:oprofile: found i386/core_i7. When I looked into the source code, arch/x86/kernel/cpu/perf_event.c, at run-time boot_cpu_data structure seems to differ in these two forms of booting. Due to this, Iam not able to use the hardware performance counters in my Xeon 5530 processor as hardware events(cache-misses etc) are being disabled. Is there any reason for this ? Any help is appreciated. Thanks, Naresh Rapolu. __...

...0 Quad-Core Skylake >>> >>> has the current EL6 variant support for it? >>> >>> Any experience? Feedback would be greatly appreciated. >> >> I found this >> >> linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c >> >> 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && >> 797 ((boot_cpu_data.x86 == 6))) { >> 798 switch (boot_cpu_data.x86_model) { >> 799 case 94: /* Skylake-S */ >> 800 case 86: /* Broadwell-DE SoC */ >> 801 case 85: /* Purley */ >&gt...

...the current EL6 variant support for it? >>>> >>>> Any experience? Feedback would be greatly appreciated. >>>> >>> >>> I found this >>> >>> linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c >>> >>> 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && >>> 797 ((boot_cpu_data.x86 == 6))) { >>> 798 switch (boot_cpu_data.x86_model) { >>> 799 case 94: /* Skylake-S */ >>> 800 case 86: /* Broadwell-DE SoC */ >>> 801 case 85:...

...t bugs. + * + * Needs: + * void check_bugs(void); + */ + +#include <linux/kernel.h> +#include <asm/alternative.h> +#include <asm/processor.h> +#include <asm/i387.h> +#include <asm/msr.h> +#include <asm/pda.h> + +void __init check_bugs(void) +{ + identify_cpu(&boot_cpu_data); +#if !defined(CONFIG_SMP) + printk("CPU: "); + print_cpu_info(&boot_cpu_data); +#endif + alternative_instructions(); +} =================================================================== --- a/include/asm-x86_64/alternative.h +++ b/include/asm-x86_64/alternative.h @@ -16,6 +16,7 @@...

...t bugs. + * + * Needs: + * void check_bugs(void); + */ + +#include <linux/kernel.h> +#include <asm/alternative.h> +#include <asm/processor.h> +#include <asm/i387.h> +#include <asm/msr.h> +#include <asm/pda.h> + +void __init check_bugs(void) +{ + identify_cpu(&boot_cpu_data); +#if !defined(CONFIG_SMP) + printk("CPU: "); + print_cpu_info(&boot_cpu_data); +#endif + alternative_instructions(); +} =================================================================== --- a/include/asm-x86_64/alternative.h +++ b/include/asm-x86_64/alternative.h @@ -16,6 +16,7 @@...

...e (which might worry people looking at the logs). Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -204,7 +204,7 @@ static void __devinit init_intel(struct detect_ht(c); } - if (smp_processor_id() == 0) { + if (c == &boot_cpu_data && c->x86 == 6) { if (probe_intel_cpuid_faulting()) set_bit(X86_FEATURE_CPUID_FAULTING, c->x86_capability); } else if (boot_cpu_has(X86_FEATURE_CPUID_FAULTING)) { _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists....

...turn -ENODEV; err = cstate_init(); diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 7012d18bb293..3f6d8b5672d5 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1383,7 +1383,7 @@ static int __init intel_uncore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return -ENODEV; - if (cpu_has_hypervisor) + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) return -ENODEV; max_packages = topology_max_packages(); diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index fee7a6efcd2d..3aea54ecab...

...turn -ENODEV; err = cstate_init(); diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 7012d18bb293..3f6d8b5672d5 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1383,7 +1383,7 @@ static int __init intel_uncore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return -ENODEV; - if (cpu_has_hypervisor) + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) return -ENODEV; max_packages = topology_max_packages(); diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index fee7a6efcd2d..3aea54ecab...

There has been some progress, but still no joy. Definitely not intended for inclusion at this point. Tim, Wei, I added a Xen command line toggle to disable IOMMU and P2M table sharing. Tim, I verified that changes to p2m-pt.c don''t break shadow mode (64bit hypervisor and Win 7 guest). Hongkaixing, I incorporated your suggestion in patch 2, so I should add your Signed-off-by eventually.

...that has caught my eye with the asm macros, which actually decreases readability, is that I can't see the macro properly expanded when I do make <filename>.s For example, I get #APP # 164 "./arch/x86/include/asm/cpufeature.h" 1 STATIC_CPU_HAS bitnum=$8 cap_byte="boot_cpu_data+35(%rip)" feature=123 t_yes=.L75 t_no=.L78 always=117 #, MEM[(const char *)&boot_cpu_data + 35B],,,, # 0 "" 2 .loc 11 164 2 view .LVU480 #NO_APP but I'd like to see the actual asm as it is really helpful when hacking on inline asm stuff. And I haven't found a wa...

Hi, This series corresponds do older patches in the paravirt series that was neither already applied, nor I will touch again. In general, they do not touch code that can be unified (at least, without being the unification a big problem on its own). They passed through this list a lot of times, so I feel them ready for inclusion, unless someone opposes. As with the other patches, they apply to

Hi, This series corresponds do older patches in the paravirt series that was neither already applied, nor I will touch again. In general, they do not touch code that can be unified (at least, without being the unification a big problem on its own). They passed through this list a lot of times, so I feel them ready for inclusion, unless someone opposes. As with the other patches, they apply to

...bx), word 9 */ -#define X86_FEATURE_FSGSBASE (7*32+ 0) /* {RD,WR}{FS,GS}BASE instructions */ +#define X86_FEATURE_FSGSBASE (9*32+ 0) /* {RD,WR}{FS,GS}BASE instructions */ #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel