search for: bitwidths

>> Would there be any interest/opposition to extending the set of simple >> integer types in MVT to include the missing multiples of 8 (up to 64 >> bits)? That is: i24, i40, i48, i56? By the way, the integer type legalization logic should probably go like this: let T be an integer type. (1) If T is legal, do nothing. (2) If there is a legal integer type which is bigger (in

On Saturday, December 05, 2009 7:34 AM, Duncan Sands wrote, > > >> Would there be any interest/opposition to extending the > set of simple > >> integer types in MVT to include the missing multiples of 8 > (up to 64 > >> bits)? That is: i24, i40, i48, i56? > > By the way, the integer type legalization logic should > probably go like > this: let

Hi all, I'm experimenting with the Interpreter and all look good so far :) Unfortunately when I play with the visitBinartOperator() method I have the following assertion error: Support/APInt.cpp:233: llvm::APInt llvm::APInt::operator*(const llvm::APInt &) const: Assertion `BitWidth == RHS.BitWidth && "Bit widths must be the same"' failed. I have recompiled llvm and

...only requires 6 bits. We could rewrite the above code as:   %8 = trunc i32 %7 to i6   %9 = and i6 %8, 63 Since we only need the lower 6 bits we could also propagate this change backwards to reduce the bitwidth of prior instructions. I'm synthesizing hardware from LLVM IR so these non-standard bitwidths can actually save chip area. I've started writing a pass to do this but I figured there might be an existing pass for downcasting 64-bit operations to 32-bit operations that I could borrow code from. Thanks, Andrew

Grr... ---------- Forwarded message ---------- From: OvermindDL1 <overminddl1 at gmail.com> Date: Sat, Dec 5, 2009 at 5:58 PM Subject: Re: [LLVMdev] Adding multiples-of-8 integer types to MVT To: Duncan Sands <duncan.sands at math.u-psud.fr> On Sat, Dec 5, 2009 at 5:33 AM, Duncan Sands <duncan.sands at math.u-psud.fr> wrote: >>> Would there be any interest/opposition

Hi, LLVMers, has someone implemented bitwidth analysis for LLVM? I was looking for something similar to the bitwise compiler described in "Bidwidth analysis with application to silicon compilation, by Mark Stephenson, Jonathan Babb and Saman Amarasinghe" e.g.: http://portal.acm.org/citation.cfm?id=349299.349317 all the best, Fernando

Hi Ken, > What would do you think of modifying case (3) slightly as follows? well, that special cases the smallest legal type, which might not be a good idea. Imagine that i10 is legal, and also i32. Is it better to turn i40 into four lots of i10 or two lots of i32 with a promotion? Expansion is expensive, so two lots of i32 would be best. I suggest the following scheme: (3) Suppose T is

We have a bitwidth analysis that can be downloaded. It is not in LLVM. There should be a link in the paper: http://www.cs.utah.edu/~regehr/papers/pldi075-cooprider.pdf John Regehr

Hello, I am wondering if there is any way to figure out bitwidth of Machine Instructions. I see that ValueType information is available for nodes of DAG, but I couldn't find similar info for Machine Instructions. I particularly need this information for x86 target. I appreciate your help and comments in this regard. Thank you, Babak

Would there be any interest/opposition to extending the set of simple integer types in MVT to include the missing multiples of 8 (up to 64 bits)? That is: i24, i40, i48, i56? Adding the types to MVT (and ValueTypes.td) would allow LLVM to be targeted to architectures that have registers and operations of these sizes (for example, a 24-bit DSP that I'd like to develop a back end for has 24-,

On Fri, 8 Jun 2007, Babak Salamat wrote: > I am wondering if there is any way to figure out bitwidth of Machine > Instructions. I see that ValueType information is available for nodes > of DAG, but I couldn't find similar info for Machine Instructions. I > particularly need this information for x86 target. > I appreciate your help and comments in this regard. Do you mean the

Dear John, thanks for pointing it to me. I just downloaded and installed CIL. However, I am getting an error when I run "make check", or when I try to compile the blink application, and I am sending you the error notice below. In any case, do you think it is possible to get some sort of 'dump' of the target C program with some bitwidth information, once I get your

Sure. David, what do you think about merging this to 3.9? Sanjay: are you saying I'd just apply that diff to InstructionSimplify.cpp, not InstCombineSelect.cpp? On Fri, Jul 22, 2016 at 7:08 AM, Sanjay Patel <spatel at rotateright.com> wrote: > Hi Hans - > > Yes, I think this is a good patch for 3.9 (cc'ing David Majnemer as code > owner). The functional change was

Sanjay: let me know if this is something that will apply to 3.9. Thanks, Hans On Wed, Jul 20, 2016 at 5:59 PM, Sanjay Patel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Quick update - the bug existed before I refactored that chunk in > InstSimplify with: > https://reviews.llvm.org/rL275911 > > In fact, as discussed in https://reviews.llvm.org/D22537 - because we have a

Hi Ken, > Would there be any interest/opposition to extending the set of simple > integer types in MVT to include the missing multiples of 8 (up to 64 > bits)? That is: i24, i40, i48, i56? the type legalizer would need some work. Consider an architecture which has a 24 bit register. Then the type legalizer should legalize an i40 by first promoting it to an i48, then expanding that to

On Jun 8, 2007, at 10:05 AM, Chris Lattner wrote: > On Fri, 8 Jun 2007, Babak Salamat wrote: >> I am wondering if there is any way to figure out bitwidth of Machine >> Instructions. I see that ValueType information is available for nodes >> of DAG, but I couldn't find similar info for Machine Instructions. I >> particularly need this information for x86 target.

David, Sanjay: ping? On Mon, Jul 25, 2016 at 11:07 AM, Hans Wennborg <hans at chromium.org> wrote: > Sure. David, what do you think about merging this to 3.9? > > Sanjay: are you saying I'd just apply that diff to > InstructionSimplify.cpp, not InstCombineSelect.cpp? > > On Fri, Jul 22, 2016 at 7:08 AM, Sanjay Patel <spatel at rotateright.com> wrote: >> Hi

LGTM On Wednesday, July 27, 2016, Hans Wennborg <hans at chromium.org> wrote: > David, Sanjay: ping? > > On Mon, Jul 25, 2016 at 11:07 AM, Hans Wennborg <hans at chromium.org > <javascript:;>> wrote: > > Sure. David, what do you think about merging this to 3.9? > > > > Sanjay: are you saying I'd just apply that diff to > >

Hi! We are compiling a very large C project in llvm and trying to execute it in interpreter. There is a problem with executing the generated bitcode. We are using lli.exe and llvm-gcc.exe from official 2.6 LLVM release. We have localized the problem to following c code: -------------------- int f(unsigned char x) __attribute__((noinline)); int f(unsigned char x) { return x - 1; } int main()

Hi, The lli interpreter crashed for the following case: ; ModuleID = 'x.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" define i32 @main() { entry: %retval = alloca i32 ; <i32*> [#uses=2] %tmp = alloca i32 ;