search for: binop

Displaying 20 results from an estimated 71 matches for "binop".

2015 Sep 30
2
InstCombine wrongful (?) optimization on BinOp with SameOperands
...shr to i32 IC: Visiting: %conv3 = trunc i64 %mul to i32 IC: Visiting: %xor = xor i32 %conv3, %conv2 IC: ADD: %xor6 = xor i64 %mul, %shr IC: Old = %xor = xor i32 %conv3, %conv2 New = <badref> = trunc i64 %xor6 to i32 * which seems to be performed by SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) In my backend's architecture truncate is free, but zext is not (and i64 is not a desirable type for xor or any binary operation in general), so I would expect this optimization to be bypassed but because of the following statement : (N0.getOpcode() == ISD::TR...
2018 Sep 25
2
[FPEnv] FNEG instruction
On Tue, Sep 25, 2018 at 1:39 PM Sanjay Patel <spatel at rotateright.com> wrote: > I have 1 concern about adding an explicit fneg op to IR: > > Currently, fneg qualifies as a binop in IR (since there's no other way to > represent it), and we have IR transforms that are based on matching that > pattern (m_BinOp). With a proper unary fneg instruction, those transforms > are not going to fire anymore. So I think we'll need to duplicate code to > account for t...
2018 Sep 26
2
[FPEnv] FNEG instruction
...Inally <cameron.mcinally at nyu.edu> > wrote: > >> On Tue, Sep 25, 2018 at 1:39 PM Sanjay Patel <spatel at rotateright.com> >> wrote: >> >>> I have 1 concern about adding an explicit fneg op to IR: >>> >>> Currently, fneg qualifies as a binop in IR (since there's no other way >>> to represent it), and we have IR transforms that are based on matching that >>> pattern (m_BinOp). With a proper unary fneg instruction, those transforms >>> are not going to fire anymore. So I think we'll need to duplicate co...
2017 Apr 02
6
[Bug 1142] New: invalid binop operation 6nft
https://bugzilla.netfilter.org/show_bug.cgi?id=1142 Bug ID: 1142 Summary: invalid binop operation 6nft Product: nftables Version: unspecified Hardware: x86_64 OS: other Status: NEW Severity: major Priority: P5 Component: nft Assignee: pablo at netfilter.org Reporter: netfilter...
2007 Nov 25
0
[LLVMdev] OCaml
> On Sunday 25 November 2007 03:42, Christopher Lamb wrote: >> Try this google query. I know there's been some discussion/work on >> OCaml and LLVM. >> >> site:lists.cs.uiuc.edu/pipermail/llvmdev OCaml interface > > I just rediscovered the OCaml bindings in bindings/ocaml (rather than the > ones > in test/Bindings/OCaml!). They do indeed look quite
2007 Nov 25
2
[LLVMdev] OCaml
On Sunday 25 November 2007 03:42, Christopher Lamb wrote: > Try this google query. I know there's been some discussion/work on > OCaml and LLVM. > > site:lists.cs.uiuc.edu/pipermail/llvmdev OCaml interface I just rediscovered the OCaml bindings in bindings/ocaml (rather than the ones in test/Bindings/OCaml!). They do indeed look quite complete but I can't find any examples
2007 Nov 25
2
[LLVMdev] OCaml
...; > most > > welcome and about 10x shorter. ;-) > > Lexing is the one issue though. How do you mean? I'm just fiddling around with it now. The lexer, parser and AST written using camlp4 might look something like this in OCaml: type ast = | Num of float | Var of string | BinOp of [ `Add | `Sub | `Mul | `Less ] * ast * ast | Call of string * ast list | Function of string * string list * ast open Camlp4.PreCast;; let expr = Gram.Entry.mk "expr" ;; EXTEND Gram expr: [ [ e1 = expr; "+"; e2 = expr -> BinOp(`Add, e1, e2) | e1 = expr; &...
2010 Feb 17
2
[LLVMdev] Kaleidoscope toy4 failure seg fault on llvm::ExecutionEngine::getTargetData (this=0x0)
...-----===// /// CurTok/getNextToken - Provide a simple token buffer. CurTok is the current /// token the parser it looking at. getNextToken reads another token from the /// lexer and updates CurTok with its results. static int CurTok; static int getNextToken() { return CurTok = gettok(); } /// BinopPrecedence - This holds the precedence for each binary operator that is /// defined. static std::map<char, int> BinopPrecedence; /// GetTokPrecedence - Get the precedence of the pending binary operator token. static int GetTokPrecedence() { if (!isascii(CurTok)) return -1; // Make su...
2010 Feb 17
0
[LLVMdev] Kaleidoscope toy4 failure seg fault on llvm::ExecutionEngine::getTargetData (this=0x0)
...simple token buffer. CurTok is the > current > /// token the parser it looking at. getNextToken reads another token from > the > /// lexer and updates CurTok with its results. > static int CurTok; > static int getNextToken() { > return CurTok = gettok(); > } > > /// BinopPrecedence - This holds the precedence for each binary operator > that is > /// defined. > static std::map<char, int> BinopPrecedence; > > /// GetTokPrecedence - Get the precedence of the pending binary operator > token. > static int GetTokPrecedence() { > if (!isascii...
2011 Oct 07
4
[LLVMdev] Enhancing TableGen
...regclass:reg)))) In fact most binary operations are: (set (type regclass:reg), (type (op (type regclass:reg), (type regclass:reg)))) So why write hundreds of patterns to express this? Using the for-loop syntax: // WARNING: Pseudo-code, many details elided for presentation purposes. multiclass binop<opcode> : sse_binop<opcode>, avx_binop<opcode>; multiclass sse_binop<opcode> { for type = [f32, f64, v4f32, v2f64] regclass = [FP32, FP64, VR128, VR128] suffix = [ss, sd, ps, pd] { def !toupper(suffix)#rr : Instr< [(set (type regclass:$dst), (typ...
2019 Apr 01
3
Please expose predicates to MachineVerifier
...ISEL, but the predicates are not being checked at this point. Thus, I could forget to check the target and build an instruction that is illegal for a specific configuration. In such a case it would be nice if the MachineVerifier could detect this for me. Example predicate IsCore8 usage: def ADDx: BINOP<...>, Requires<[IsCore8]>; let Predicates=[IsCore8] in { def : SUBX: BINOP<...>; } The predicates are encoded into the targets GenDAGIsel file but not anywhere else that I can find: OPC_CheckPatternPredicate, 4, // (Subtarget.isCore8()) Thanks -------------- next part ------...
2010 Feb 17
1
[LLVMdev] Kaleidoscope toy4 failure seg fault on llvm::ExecutionEngine::getTargetData (this=0x0)
...> current >> /// token the parser it looking at.  getNextToken reads another token from >> the >> /// lexer and updates CurTok with its results. >> static int CurTok; >> static int getNextToken() { >>  return CurTok = gettok(); >> } >> >> /// BinopPrecedence - This holds the precedence for each binary operator >> that is >> /// defined. >> static std::map<char, int> BinopPrecedence; >> >> /// GetTokPrecedence - Get the precedence of the pending binary operator >> token. >> static int GetTokPrece...
2017 Jan 20
3
getScalarizationOverhead()
On 2017-01-20 14:31, Hal Finkel wrote: > > On 01/20/2017 06:11 AM, Jonas Paulsson via llvm-dev wrote: >> Hi, >> >> I wonder why getScalarizationOverhead() does not take into account >> the number of operands of the instruction? This should influence the >> number of extracts needed, so instead of >> >> Scalarization cost = NumEls * (insert +
2007 Nov 26
0
[LLVMdev] Fibonacci example in OCaml
Here is a complete 104-line native code compiler for a tiny subset of OCaml that is expressive enough to compile an external Fibonacci program: type expr = | Int of int | Var of string | BinOp of [ `Add | `Sub | `Leq ] * expr * expr | If of expr * expr * expr | Apply of expr * expr type defn = | LetRec of string * string * expr open Camlp4.PreCast;; let expr = Gram.Entry.mk "expr" let defn = Gram.Entry.mk "defn" let prog = Gram.Entry.mk "defn" EXTE...
2018 May 23
0
RFC: should CVP always narrow the width of lshr?
...ere are multiple solutions, and more than one solution can be implemented, i suppose. 1. https://reviews.llvm.org/D46760 Somehow relax instcombine, to check for this very specific pattern. I don't think we want that. 2. Extend aggressive-instcombine to narrow a sequence of arbitrary binops (and maybe even more than binops). This is probably the most powerful, but i'm not quite sure how it would look.. 3. Teach CVP to always narrow the width of lshr. https://reviews.llvm.org/D47113 As Sanjay Patel notes in https://reviews.llvm.org/D47113#1106601, > <cut>...
2011 Oct 07
0
[LLVMdev] Enhancing TableGen
...ons are: > > (set (type regclass:reg), (type (op (type regclass:reg), (type regclass:reg)))) > > So why write hundreds of patterns to express this? Using the for-loop > syntax: > > // WARNING: Pseudo-code, many details elided for presentation purposes. > > multiclass binop<opcode> : sse_binop<opcode>, avx_binop<opcode>; > > multiclass sse_binop<opcode> { > for type = [f32, f64, v4f32, v2f64] > regclass = [FP32, FP64, VR128, VR128] > suffix = [ss, sd, ps, pd] { > > def !toupper(suffix)#rr : Instr< >...
2011 Oct 08
0
[LLVMdev] Enhancing TableGen
...rations are: > > (set (type regclass:reg), (type (op (type regclass:reg), (type regclass:reg)))) > > So why write hundreds of patterns to express this?  Using the for-loop > syntax: > > // WARNING: Pseudo-code, many details elided for presentation purposes. > > multiclass binop<opcode> : sse_binop<opcode>, avx_binop<opcode>; > > multiclass sse_binop<opcode> { >  for type = [f32, f64, v4f32, v2f64] >      regclass = [FP32, FP64, VR128, VR128] >      suffix = [ss, sd, ps, pd] { > >    def !toupper(suffix)#rr : Instr< >    ...
2007 Nov 25
2
[LLVMdev] Fibonacci example in OCaml
Here's my translation of the Fibonacci example into OCaml: open Printf open Llvm let build_fib m = let fibf = define_function "fib" (function_type i32_type [| i32_type |]) m in let bb = builder_at_end (entry_block fibf) in let one = const_int i32_type 1 and two = const_int i32_type 2 in let argx = param fibf 0 in set_value_name "AnArg" argx; let
2007 Jul 23
2
[LLVMdev] LHS of an expression
...%tmp into maybe a variable set. If i have a store instruction then it is pretty much simpler as the getOperand(1) can give me the LHS of the expression but in the above case how can we get it. I tried searching for some stuff and got a method called getLHS() method using BinaryOperator and takes Binops as parameter but i dont think that is of much help if i am having a malloc instruction. Can anybody please guide me on this thing please? Thanks in advance.. Abhinav
2011 Oct 07
0
[LLVMdev] Enhancing TableGen
My purpose is to eliminate copy-paste style of programming in td files as much as possible, but only to a point that the new language constructs do not create too much overhead/readability-downgrade. In other words, I am targeting those low-hanging fruit of copy-paste programmings in td files that are eliminated by a simple for-loop syntax. The repetitive patterns I observed in PTX backend (and