search for: bctr

On Fri, 12 May 2006, Ralph Corderoy wrote: >> If you don't *know* that all (e.g.) function pointers to this code are >> dead (which means that execution could come back to the function), you >> should use the ExecutionEngine::recompileAndRelinkFunction(F) method. > > recompileAndRelinkFunction() overwrites the old machine code with a > branch to the new. Is it

...s a bug: please > report it! No, EmitBranchToAt() always emits 16 bytes. AtI[0] = BUILD_LIS(12, Addr >> 16); // lis r12, hi16(address) AtI[1] = BUILD_ORI(12, 12, Addr); // ori r12, r12, low16(address) AtI[2] = BUILD_MTCTR(12); // mtctr r12 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl but I understand now how startFunctionStub() is given StubSize and on PowerPC it's 16 so there's no problem. Cheers, Ralph.

...hris' solution is functional enough. However, I looked into llvm-gcc code and the switch instruction switches for all possible labels defined in the method. Does LLVM is smart enough to realize that it switches on the address of a label, therefore only has to generate a jmp in x86 or a {mtctr, bctr} couple in powerpc? Nicolas

...unctional enough. However, I looked into llvm-gcc > code and the switch instruction switches for all possible labels defined > in the method. Does LLVM is smart enough to realize that it switches on > the address of a label, therefore only has to generate a jmp in x86 or a > {mtctr, bctr} couple in powerpc? I'm not sure what you mean. We do reasonable optimization of switch statements, but I'm sure there are cases we miss. If so, please let us know, so we can add them to lib/Target/README.txt -Chris -- http://nondot.org/sabre/ http://llvm.org/

On Jan 11, 2007, at 7:14 AM, Chris Lattner wrote: > On Wed, 10 Jan 2007, Nicolas Geoffray wrote: >> I was looking for an indirect branch instruction in llvm, which would >> not take a BasicBlock as argument, but a value. Reid told me on >> IRC that >> there is no such instruction in llvm. >> >> Is this deliberate? Or did you never face the need of this

.... However, I looked into llvm-gcc >> code and the switch instruction switches for all possible labels defined >> in the method. Does LLVM is smart enough to realize that it switches on >> the address of a label, therefore only has to generate a jmp in x86 or a >> {mtctr, bctr} couple in powerpc? >> > > I'm not sure what you mean. We do reasonable optimization of switch > statements, but I'm sure there are cases we miss. If so, please let us > know, so we can add them to lib/Target/README.txt > > Two jumps are executed when usi...

RegScavenger is complaining about use of an undefined register, CTR8, in the BCTR8 instruction, in the following instance (this is from the PPC backend): BB#38: derived from LLVM BB %for.end50 Predecessors according to CFG: BB#36 %X3<def> = LD 0, <fi#27>; mem:LD8[FixedStack27] %X4<def> = RLDICR %X3<kill>, 3, 60 %X5<def>...