search for: bagels

Displaying 20 results from an estimated 137 matches for "bagels".

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2010 Jul 12
3
Continuing on with a loop when there's a failure
Hi R sages, Here is my latest problem. Consider the following toy example: x <- read.table(textConnection("y1 y2 y3 x1 x2 indv.1 bagels donuts bagels 4 6 indv.2 donuts donuts donuts 5 1 indv.3 donuts donuts donuts 1 10 indv.4 donuts donuts donuts 10 9 indv.5 bagels donuts bagels 0 2 indv.6 bagels donuts bagels 2 9 indv.7 bagels donuts bagels 8 5 indv.8 bagels donuts bagels 4 1 indv.9 donuts donuts donuts 3 3 indv.10 bagels donuts b...
2010 Jul 20
1
Nesting functions in loops that result in error messages breaking the loop
Hello all, I am trying to write a program in R in which I call a function multiple times within a loop. The problem is that sometimes the function breaks down while calling another function, and produces an error message that breaks my loop and the program stops. I would like to keep the loop running when this function breaks down, and just move on to the next iteration in the loop. Is there
2007 Dec 29
15
Do you think it would look cleaner?
I was looking over some of my specs. I was thinking that the following: @game.should_receive(:name).and_return(''The Battle for Blaze'') @game.should_receive(:people).and_return(5000000) @game.should_receive(:activated).and_return(true) Would it look cleaner if I could do this instead? @game.should_recieve_and_return( :name => ''The Battle for Blaze''
2010 Sep 26
2
Splitting a data frame into several completely separate data frames
...d of different data frames, but what I want is separate data frames. Ideally, I'd like to design a loop to give sequentially-numbered names to the separate data frames I create. This is because my real data will have many more than two groups (i.e., many more types of things than just "bagels" versus "donuts") and the number of groups will vary when I apply the same code to different data sets. Many thanks in advance for your replies! ----------------------------------- Josh Banta, Ph.D Center for Genomics and Systems Biology New York University 100 Washington Square E...
2010 Jun 19
1
Extracting P-values from the lrm function in the rms library
Hello again R users, I have a devilishly hard problem, which should be very simple. I hope someone out there will have the answer to this on the tip of their tongue. Please consider the following toy example: x <- read.table(textConnection("y x1 x2 indv.1 bagels 4 6 indv.2 donuts 5 1 indv.3 donuts 1 10 indv.4 donuts 10 9 indv.5 bagels 0 2 indv.6 bagels 2 9 indv.7 bagels 8 5 indv.8 bagels 4 1 indv.9 donuts 3 3 indv.10 bagels 5 9 indv.11 bagels 9 10 indv.12 bagels 3 1 indv.13 donuts 7 10 indv.14 bagels 2 10 indv.15 bagels 9 6"), header = TRUE) I am fit...
2017 Feb 17
2
multiprecision add/sub
On 02/16/2017 12:08 PM, Stephen Canon wrote: >> On Feb 16, 2017, at 9:12 AM, Bagel <bagel99 at gmail.com >> <mailto:bagel99 at gmail.com>> wrote: >> >> I figured that the optimization of this would bedifficult (else it would >> have already been done :-)) > > Don’t make this assumption. There’s lots of opportunities for optimization > scattered
2010 Nov 23
3
[LLVMdev] question on the status of debugging symbols
Would someone be so kind as to tell me what the status of debugging symbols (DWARF) generated by clang/llvm is? I am on a linux x86-64 system (Fedora 13). Is gdb supposed to understand the generated DWARF? When I generate an executable with "clang -g" followed by "llc -O0" and feed it to gdb, I get "no debugging symbols found". What is the status of lldb on
2009 Aug 13
3
[LLVMdev] Branch Relaxation Support?
I think I have read that there are plans to generate object code (e.g. ELF) directly in addition to assembly language source. If so, are there plans to support branch relaxation for targets which support long/short branch displacements? This is typically done in assemblers. thanks, bagel
2008 Mar 15
1
[LLVMdev] Question on use of subregs
Thanks, I seem to have gotten sub-registers to work. I can't seem to suppress the zero-extend sometimes. There is no need to explicitly zero extend bytes to words on this machine as all byte operations do that. I have also gotten some memory-to-memory to work. Bagel Evan Cheng wrote: > On Mar 14, 2008, at 10:17 AM, Bagel wrote: > >> I'm trying to write a backend for a
2016 Nov 10
3
array fill idioms
Yes, I know this works peachy keen for char arrays. I'm looking at (which is hard to express in C) something like void foo () { int bar[20] = { 42, 42, ..., 42 }; } I don't want to do a memcopy of the 20 element constant array, and memset doesn't work here. I want an intrinsic that copys the scalar int constant 42 to each element of the int array. bagel On 11/10/2016 03:30
2010 Nov 24
0
[LLVMdev] question on the status of debugging symbols
On 23 November 2010 18:03, Bagel <bagel99 at gmail.com> wrote: > Would someone be so kind as to tell me what the status of debugging symbols > (DWARF) generated by clang/llvm is? Hi Bagel, It should be fairly complete... > When I generate an executable with "clang -g" followed by "llc -O0" and feed it > to gdb, I get "no debugging symbols found".
2020 Mar 24
3
Questions on ifconversion and predication
Assume an architecture that has multiple condition code registers, e.g., powerpc. Now assume that there are predicate instructions like thumb2, but can specify which condition code register they refer to. Now also assume that these predicate instructions themselves are predicatible, if executed they change the current predication state. Can LLVM handle multiple levels of predication? When is
2017 Mar 07
2
multiprecision add/sub
> On Feb 21, 2017, at 9:54 PM, Nemanja Ivanovic via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I believe that providing additional intrinsics that would directly produce the ISD::ADDC/ISD::SUBC nodes would provide the additional advantage of being able to directly produce these nodes for code that doesn't have anything to do with multiprecision addition/subtraction. I am
2010 Dec 04
4
[LLVMdev] question on generating dwarf metadata
On 12/03/2010 06:28 PM, Devang Patel wrote: > We are working on a document. Here is current draft: > http://wiki.llvm.org/Debug_Information > > - > Devang While this is great news, it doesn't completely satisfy my needs. Your documentation assumes one is going to use the LLVM provided functions (such as DIFactory::). My front-end can't use them because it is not
2008 Mar 14
2
[LLVMdev] Question on use of subregs
I'm trying to write a backend for a machine that has both byte and word instructions. Both varieties of instructions operate on the same set of general registers. A byte mode instruction on a general register always clears the upper bits. Register-to-register byte mode and work mode instructions set condition codes based on bytes and words and thus are not interchangeable. Do I need to
2004 May 19
0
Updated Fedora Core 2 Packages [unofficial]
Hi All, I have updated Fedora Core 2 packages available for Samba 3.0.4. These include the winbind patch as was already inclded in the latest Mandrake Cooker packages and also a fix for the winbind.init startup script. More info on the winbind patch can be found at this location: https://bugzilla.samba.org/show_bug.cgi?id=1315 The winbind.init startup script had the following code changed:
2011 Jun 24
2
[LLVMdev] multiple return value assembler regression?
On 06/24/2011 03:45 PM, Chris Lattner wrote: > > On Jun 24, 2011, at 9:29 AM, Bagel wrote: > >> It appears the syntax for returning multiple values has changed since 2.9. >> Previous to that: >> ret i32 %a, i32 %b >> worked. The new syntax is something like: >> ret { i32, i32 }{i32 %a, i32 %b} >> but this yields an error: >> mrv-bug.ll:5:24:
2015 Jul 17
3
[LLVMdev] 2-address and 3-address instructions
I am writing a backend for an experimental machine that has both 2-address and 3-address versions of some instructions. The 2-address versions are more compact and thus preferred when applicable. How does one go about generating the most compact version? 1. At instruction selection, is there a predicate that can test whether one of the input sources is dead, thus allowing the selection of the
2010 Dec 06
4
[LLVMdev] question on generating dwarf metadata
On 12/06/2010 12:03 PM, Devang Patel wrote: > As I understand, you are not interested in 'how to use DIFactory'. Do you want > to know what are the fields of metadata to encode debug info for a local variable ? > That'd be > > !7 = metadata !{ > i32, ;; Tag (see below) > metadata, ;; Context > metadata, ;; Name > metadata, ;; Reference to
2008 Mar 14
0
[LLVMdev] Question on use of subregs
On Mar 14, 2008, at 10:17 AM, Bagel wrote: > I'm trying to write a backend for a machine that has both byte and > word > instructions. Both varieties of instructions operate on the same > set of > general registers. A byte mode instruction on a general register > always clears > the upper bits. Register-to-register byte mode and work mode > instructions set