search for: avx512_gather

...recently been doing something similar for the new ARM SVE architecture, so hopefully this will get you closer to what you need: If you’re looking where I think you are (lib/Target/X86/X86InstrAVX512.td), ‘GatherNode’ is a template argument, not a definition. It allows a PatFrag be passed into the avx512_gather multiclass definition. Working backwards from here, the actual PatFrags passed into this are things like ‘mgatherv4i32’. These are patterns that match a MaskedGatherSDNode for a particular data type. MaskedGatherSDNode is the generic SD node that represents a predicated gather, which in turn was...

Hello. Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have to say that the definition of the "multiclass avx512_gather" from lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it. I currently have some serious problems with TableGen - it gives an assertion failure: "llvm/utils/TableGen/CodeGenDAGPatterns.cpp:2153: llvm::TreePatternNode* llvm::TreePattern::ParseTreePat...

Hello. I read on page 4 of http://www.cs.fsu.edu/~whalley/cda5155/chap4.pdf that gather and scatter operations exist for Mips, named LVI and SVI, respectively. Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector instructions) gather and scatter operations? If so, can you share with me the TableGen spec? (I tried to start from LD_DESC_BASE, but it

...al), which should have fixed this problem, but it doesn't. Best regards, Alex On 12/11/2016 5:31 AM, Alex Susu wrote: > Hello. > Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have > to say that the definition of the "multiclass avx512_gather" from > lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it. > > I currently have some serious problems with TableGen - it gives an assertion failure: > "llvm/utils/TableGen/CodeGenDAGPatterns.cpp:2153: llvm::TreePatternNode* > llvm::TreeP...

...m, but it doesn't. > > Best regards, > Alex > > > > On 12/11/2016 5:31 AM, Alex Susu wrote: >> Hello. >> Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have >> to say that the definition of the "multiclass avx512_gather" from >> lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it. >> >> I currently have some serious problems with TableGen - it gives an assertion failure: >> "llvm/utils/TableGen/CodeGenDAGPatterns.cpp:2153: llvm::TreePatternNode*...

...rNode addr:$src2)), (GATHER_256B addr:$src2)>; Thank You On Mon, Aug 7, 2017 at 2:57 AM, Craig Topper <craig.topper at gmail.com> wrote: > masked_gather returns two results. The data and the modified mask. Note > the $dst and the $mask_wb in the pattern below. > > multiclass avx512_gather<bits<8> opc, string OpcodeStr, X86VectorVTInfo _, > X86MemOperand memop, PatFrag GatherNode> { > let Constraints = "@earlyclobber $dst, $src1 = $dst, $mask = $mask_wb", > ExeDomain = _.ExeDomain in > def rm : AVX5128I<opc, MRM...

...ig Topper <craig.topper at gmail.com> >>>> wrote: >>>> >>>>> masked_gather returns two results. The data and the modified mask. >>>>> Note the $dst and the $mask_wb in the pattern below. >>>>> >>>>> multiclass avx512_gather<bits<8> opc, string OpcodeStr, >>>>> X86VectorVTInfo _, >>>>> X86MemOperand memop, PatFrag GatherNode> { >>>>> let Constraints = "@earlyclobber $dst, $src1 = $dst, $mask = >>>>> $mask_wb", &...

i want to implement gather for v64i32. i wrote following code. def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst), (ins i2048mem:$src), "GATHER_256B\t{$src, $dst|$dst, $src}", [(set VR_2048:$dst, (v64i32 (masked_gather addr:$src)))], IIC_MOV_MEM>, TA; def: Pat<(v64f32 (masked_gather addr:$src)), (GATHER_256B