search for: armii

Displaying 11 results from an estimated 11 matches for "armii".

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2015 Jan 08
4
[LLVMdev] Machine LICM and cheap instructions?
...es this more-customized definition: bool ARMBaseInstrInfo:: hasLowDefLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx) const { if (!ItinData || ItinData->isEmpty()) return false; unsigned DDomain = DefMI->getDesc().TSFlags & ARMII::DomainMask; if (DDomain == ARMII::DomainGeneral) { unsigned DefClass = DefMI->getDesc().getSchedClass(); int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx); return (DefCycle != -1 && DefCycle <= 2); } return false; } So it won't hoist instructions th...
2013 Aug 21
2
[LLVMdev] Broken PLT on ARM from R183966
Hi Anton and JF, Thanks for your review. After reading the source code more carefully, I have come up with a different way fix this issue. We can simply resolve this issue by adding ARMII::MO_PLT flags with MachineInstrBuilder in FastISel pass (without failing back to DAG lowering). The new patch is attached, and the test case is not changed. Sorry for your inconvenience. Please have a look. Thanks for your help. Sincerely, Logan On Wed, Aug 21, 2013 at 10:52 PM, JF Bastien...
2013 Aug 21
2
[LLVMdev] Broken PLT on ARM from R183966
For ARM targets on linux, revision 183966 made Fast ISel default. Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT flags to calls in PIC mode (at least when emitting assembly); it never does this. The normal ISel pass handles this situation correctly so a temporary local change to disable FastISel for linux / NaCl targets is working for me right now. I'm not very familiar with the ISel passes....
2013 Aug 21
0
[LLVMdev] Broken PLT on ARM from R183966
...On Wed, Aug 21, 2013 at 8:04 AM, Logan Chien <tzuhsiang.chien at gmail.com>wrote: > Hi Anton and JF, > > Thanks for your review. After reading the source code more carefully, I > have come up with a different way fix this issue. We can simply resolve > this issue by adding ARMII::MO_PLT flags with MachineInstrBuilder in > FastISel pass (without failing back to DAG lowering). > > The new patch is attached, and the test case is not changed. Sorry for > your inconvenience. Please have a look. Thanks for your help. > > Sincerely, > Logan > > &gt...
2013 Aug 21
1
[LLVMdev] Broken PLT on ARM from R183966
...13 at 8:04 AM, Logan Chien <tzuhsiang.chien at gmail.com<mailto:tzuhsiang.chien at gmail.com>> wrote: Hi Anton and JF, Thanks for your review. After reading the source code more carefully, I have come up with a different way fix this issue. We can simply resolve this issue by adding ARMII::MO_PLT flags with MachineInstrBuilder in FastISel pass (without failing back to DAG lowering). The new patch is attached, and the test case is not changed. Sorry for your inconvenience. Please have a look. Thanks for your help. Sincerely, Logan On Wed, Aug 21, 2013 at 10:52 PM, JF Bastien...
2013 Aug 21
2
[LLVMdev] Broken PLT on ARM from R183966
...> >> > On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> >> > wrote: >> > > For ARM targets on linux, revision 183966 made Fast ISel default. >> > > Unfortunately, Fast ISel is broken in terms of applying the >> > > ARMII::MO_PLT flags to calls in PIC mode (at least when emitting >> > > assembly); it never does this. The normal ISel pass handles this >> > > situation correctly so a temporary local change to disable FastISel >> > > for linux / NaCl targets is working for me right...
2013 Aug 21
0
[LLVMdev] Broken PLT on ARM from R183966
...On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> > >> > wrote: > >> > > For ARM targets on linux, revision 183966 made Fast ISel default. > >> > > Unfortunately, Fast ISel is broken in terms of applying the > >> > > ARMII::MO_PLT flags to calls in PIC mode (at least when emitting > >> > > assembly); it never does this. The normal ISel pass handles this > >> > > situation correctly so a temporary local change to disable FastISel > >> > > for linux / NaCl targets is worki...
2013 Aug 21
2
[LLVMdev] Broken PLT on ARM from R183966
...gle.com. > > Thanks! > > -eric > > On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> > wrote: > > For ARM targets on linux, revision 183966 made Fast ISel default. > > Unfortunately, Fast ISel is broken in terms of applying the > > ARMII::MO_PLT flags to calls in PIC mode (at least when emitting > > assembly); it never does this. The normal ISel pass handles this > > situation correctly so a temporary local change to disable FastISel > > for linux / NaCl targets is working for me right now. > > > > &...
2013 Aug 21
0
[LLVMdev] Broken PLT on ARM from R183966
...ould be a good start, go ahead and cc me and jfb at google.com. Thanks! -eric On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> wrote: > For ARM targets on linux, revision 183966 made Fast ISel default. > Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT > flags to calls in PIC mode (at least when emitting assembly); it never does > this. The normal ISel pass handles this situation correctly so a temporary > local change to disable FastISel for linux / NaCl targets is working for me > right now. > > > > I’m not ve...
2013 Aug 21
0
[LLVMdev] Broken PLT on ARM from R183966
...> > -eric > > > > On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> > > wrote: > > > For ARM targets on linux, revision 183966 made Fast ISel default. > > > Unfortunately, Fast ISel is broken in terms of applying the > > > ARMII::MO_PLT flags to calls in PIC mode (at least when emitting > > > assembly); it never does this. The normal ISel pass handles this > > > situation correctly so a temporary local change to disable FastISel > > > for linux / NaCl targets is working for me right now. > &...
2010 Nov 17
1
[LLVMdev] [llvm-commits] [patch] ARM/MC/ELF add new stub for movt/movw in ARMFixupKinds
+llvmdev -llvmcommits On Fri, Nov 12, 2010 at 8:03 AM, Jim Grosbach <grosbach at apple.com> wrote: > Sorta. getBinaryCodeForInst() is auto-generated by tablegen, so shouldn't be modified directly. The target can register hooks for instruction operands for any special encoding needs, including registering fixups, using the EncoderMethod string. For an example, have a look at the