search for: armcmp

I have hit a extreme case during a bootstrap. The DAG combiner canonicalizes <= 65536 into < 65537 The problem is that 65536 can de represented inline in a ARM instruction and 65537 cannot. I am considering changing the code that creates ARMCMP when lowering br_cc and set_cc nodes. Does anyone has a better solution? Best Regards, Rafael

...for nodes affecting the control flow. But I'm not quite sure. Can someone describe the semantics of this property and also what is a typical usage of it? In particular, I have found that CMP nodes for different targets are described differently with regard to this property. ARM backend defines armcmp without this property. PCC defines PCCvcmp and PCCvcmp_o also without this property. In Sparc backend SPcmpicc is also not using it. But X86cmp does for some reason. I'm trying to understand if I need it for my backend or not. It would be also interesting to get some information about other SD...

On Thu, 5 Oct 2006, Roman Levenstein wrote: >> Check out how the sparc or powerpc backends handle this. They lower >> to a >> select_cc pseudo-op that expands to an if/then/else control flow. > > Thanks! The hint about a pseudo-op was really good. After I realized how > it works, I started the implementation of SELECT_CC using this approach. > Hopefully, I can

> On Wed, 4 Oct 2006, Roman Levenstein wrote: > >> You can add the line > >> setOperationAction(ISD::SELECT, MVT::i32, Expand); > >> to the constructor of you TargetLowering class. See the current > >> backend for an example. > > > > I actually tried it first. But then if, I remember correctly, > SELECT > > nodes were expanded into