search for: arm926ejs

Hi all, I'm trying to use libspeex 1.1.10 on an ARM926EJ-Sid(wb) rev 3 (v5l). I executed the speexenc and speexdec test files and they can encode and decode. But I'm getting 95% of cpu utilization on the codification and 44% on the decodification. I saw in the post: http://lists.xiph.org/pipermail/speex-dev/2005-June/003485.html that this version of speex works fine on ARM

Hi, I tried the same options suggested in your post and the problem continues. What do you suggest? 2005/9/15, Jean-Marc Valin <Jean-Marc.Valin@usherbrooke.ca>: > Hi Eduardo, > > All I can say is that the timings you have are a bit odd. What > optimizations options are you using (I suggest -O3)? Also, perhaps you > can try --enable-arm4-asm just in case. I've had the

Hi Eduardo, All I can say is that the timings you have are a bit odd. What optimizations options are you using (I suggest -O3)? Also, perhaps you can try --enable-arm4-asm just in case. I've had the encoder running in real-time on a chip that's at least twice slower than yours with the settings you're using. Jean-Marc Le jeudi 15 septembre 2005 ? 16:23 -0400, Eduardo Bezerra a

Hi, I just realized that clang produces Thumb-2 instruction in code even when older CPU type which doesn't suport Thumb-2 is specified. Here is output: # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c clang version 3.0 (http://llvm.org/git/clang.git 98138cdfdee05c0afbab2b209ce8cfe4a52474e1) Target: arm-unknown-freebsd Thread

(Resending since the archive seems to have eaten the text.) I'm working on getting Speex running on a TI Davinci (6441), on both the ARM and the DSP. My immediate goal is to understand the processing requirements on different architectures so that I can properly specific an engineering project. I have it up and running on the ARM, and I just wanted to see if anyone could sanity-check

[CCing the libguestfs mailing list - as Rich responded on IRC about your question on timeout.] On Sun, Feb 21, 2016 at 10:07 PM, Thomas Kee <xsited@yahoo.com> wrote: > Hi Kashyap, > > Thanks for offering to help. The day job caused a pause and it took me an > hour to reassert where I was in the process. I usually hang out on freenet > as xsited. I am still reading the

In the help command when i checked the processors supported by llvm 2.9 it showed arm926ej-s. which means thumb mode is supported right? this belongs to armv5. but the llvm documentation says thumb mode is supported only for armv6 and higher.. does it mean there is only a partial support for this processor? -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi > I just realized that clang produces Thumb-2 instruction in code even when older CPU type which doesn't suport Thumb-2 is specified. > > Here is output: > > # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > clang version 3.0 (http://llvm.org/git/clang.git 98138cdfdee05c0afbab2b209ce8cfe4a52474e1) >

On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: > # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c Even though you specified cpu as arm9, it's probably generating generic ARM IR (use -emit-llvm -S and see), which defaults to ARM instructions. If you want thumb, use triple =

Hi, I'm trying to get speex working on an ARM board (ARM926EJ-Sid(wb) core, ARM 5TE architecture) and getting segfaults if build with "--enable-fixed-point --enable-arm5e-asm" options. If I use just "--enable-fixed-point", then it runs fine, but once I add "--enable-arm5e-asm" it start crashing (I use testenc to test it). Further investigation showed, that it

...ect, NUT is only designed to work with the libusb-0.1 API (provided by libusb-compat). > > I could not fing any more solution of that. Therefore, I turn to > developers. config.log is attached. Here are my hardware and > software configurations: > CPU: Marvell 88E6281 with ARM926ejs > Linux ver: 2.6.31.8 > cinfigure commnd: > ./configure --with-usb --with-doc \ > --host=arm-mv5sft-linux-gnueabi \ > --prefix=/mnt/ARM_FS \ > How did you install libusb-1.0? It appears that the actual .so file was not installed properly: configure:7259: checking for libusb ver...

Well how about as a strawman... taking some options from http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores and http://en.wikipedia.org/wiki/List_of_applications_of_ARM_cores LLVM Supports: ARMv4T -> ARM7TDMI ARMv5TE -> ARM926EJ-S -> XScale ARMv6 -> ARM1136J(F)-S ARMv6ZK -> ARM1176JZ(F)-S ARMv7A -> Cortex-A8 Cortex-A9 ARMv7M -> Cortex-M3

Did you test what happens if you only enable arm4 assembly? Also, if you can do some investigation, it would be useful to check what bit of assembly is causing the crash. Can you disable one at a time and check? Jean-Marc Alexander Chemeris a ?crit : > Hi, > > I'm trying to get speex working on an ARM board (ARM926EJ-Sid(wb) core, > ARM 5TE architecture) and getting segfaults

Erik de Castro Lopo wrote: >> Currently, compression settings are as follows >> >> -6, -l 8 -b 4096 -m -r 6-A tukey(0.5) >> -7, -l 8 -b 4096 -m -e -r 6-A tukey(0.5) >> -8, -l 12 -b 4096 -m -e -r 6-A tukey(0.5) >> >> I suggest the following, in case my previous patch is accepted >> >> -6, -l 8 -b 4096 -m -r 6 -A tukey(0.5);partial_tukey(2)

Martijn van Beurden wrote: >> And I also suggested to consider a different setting for -7 preset: >> -7 == -l 12 -b 4096 -m -r 6 -A tukey(0.5);partial_tukey(2) >> see <http://www.hydrogenaud.io/forums/index.php?s=&showtopic=106545&view=findpost&p=871797> >> >> But it will decrease decoding speed for this preset. > > Yes, that is another thing

Hi masters, I am trying to deploy theora in Fressacle iMX27 (ARM-9) processor. This hardware does not support floating point operations, i've compiled the libtheora with ?--disable-float option . mx27# cat /proc/cpuinfo Processor ? ? ? : ARM926EJ-S rev 4 (v5l) BogoMIPS ? ? ? ?: 199.06 Features ? ? ? ?: swp half thumb fastmult edsp java CPU implementer : 0x41 CPU architecture: 5TEJ CPU variant

On Jun 22, 2011, at 3:16 PM, Renato Golin wrote: > On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: >> # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > > Even though you specified cpu as arm9, it's probably generating > generic ARM IR (use -emit-llvm -S and see), which defaults

On Thu, Oct 13, 2011 at 11:25 AM, Joe Abbey <jabbey at arxan.com> wrote: > LLVM Supports: > ARMv4T  -> ARM7TDMI > ARMv5TE -> ARM926EJ-S >         -> XScale > ARMv6   -> ARM1136J(F)-S > ARMv6ZK -> ARM1176JZ(F)-S > ARMv7A  -> Cortex-A8 >            Cortex-A9 > ARMv7M  -> Cortex-M3 Does the LLVM code generator generate Thumb code in addition to

Hi Fellows, The goal is to find the induction variable for a loop, where the induction variable increments with the multiplication, division or shift operations, like this one: sz = 8; do { ... ... sz = sz / 2; } while (sz) Is SCEV capable of detecting the induction variable 'sz' in this case? The code snippet I am using to solve the problem is for each basic-block in a

> The ARM Holdings emulator does this; I used it with great success to > profile an Advanced Encryption Standard encryptor a while back. It is indeed a useful piece of kit. We do a lot of our internal regression tests on it, and also run LLVM's regression tests every night on it (as well as PlumHall, EEMBC and SpecInt). Unfortunately it's not exactly software we can give away or