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On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote: > On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote: >> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote: >> > Hi Ilia, >> > >> > Actually 0x90b8 is different than copy engine. I'm not very f...

On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote: > Hi Ilia, > > Actually 0x90b8 is different than copy engine. I'm not very familiar > with it, but 0x90b8 is an engine for performing LZO decompression as > part of performing the copy. It has a variety of limitations (e.g., > cannot handle blockline...

Hi, The VBIOS on GM20x GPUs uses a slightly updated version of the DCB. I've posted an updated DCB spec here: ftp://download.nvidia.com/open-gpu-doc/DCB/2/DCB-4.x-Specification.html You can diff it against the previous version: ftp://download.nvidia.com/open-gpu-doc/DCB/1/DCB-4.0-Specification.html to see what changed (sorry for having to diff html files). The biggest differences are

On Wed, Dec 10, 2014 at 7:36 AM, Ben Skeggs <skeggsb at gmail.com> wrote: > On Wed, Dec 10, 2014 at 4:26 AM, Andy Ritger <aritger at nvidia.com> wrote: >> Hi, > Hey Andy, > >> >> The VBIOS on GM20x GPUs uses a slightly updated version of the DCB. >> I've posted an updated DCB spec here: >> >> ftp://download.nvidia.com/open-gpu-doc/DCB/2/DCB-4.x-Specification.html >> >&...

On Sat, Dec 13, 2014 at 6:42 PM, Andy Ritger <aritger at nvidia.com> wrote: > On Wed, Dec 10, 2014 at 07:46:16AM +1000, Ben Skeggs wrote: >> On Wed, Dec 10, 2014 at 7:36 AM, Ben Skeggs <skeggsb at gmail.com> wrote: >> > On Wed, Dec 10, 2014 at 4:26 AM, Andy Ritger <aritger at nvidia.com> wrote: >> >> Hi, &g...

On Tue, Nov 25, 2014 at 10:57:44AM -0500, Ilia Mirkin wrote: > On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote: > > On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote: > >> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote: > >> > Hi Ilia, > >> > > >> > Actually 0x90b8 is different than copy en...

On 23/11/17 10:06, John Hubbard wrote: > On 11/22/2017 05:07 PM, Martin Peres wrote: >> Hey, >> >> Thanks for your answer, Andy! >> >> On 22/11/17 04:06, Ilia Mirkin wrote: >>> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote: >>> Martin's question was very long, but it boils down to this: >>> >>> How do we compute the correct values to write into the e114/e118 pwm >>> registers based on the VBIOS contents and current state of the board >>> (like t...

Hey, Thanks for your answer, Andy! On 22/11/17 04:06, Ilia Mirkin wrote: > On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote: >> Hi Martin, > > Martin should have complete answers, > >> >> I was asked to clarify a few things: >> >> (1) Are all the user reports of loud fans on Fermi-era GPUs? > > Yes. Although I believe some GK208 users are also havin...

...LINKED_TSC mode (i.e. method 0x1234 == 1)? We don't currently make use of that mode in nouveau, but I'm thinking about doing it on Tesla / Fermi so that we can get more than 16 textures per stage on there. Thanks again for the info! -ilia On Wed, Mar 7, 2018 at 3:21 PM, Andy Ritger <aritger at nvidia.com> wrote: > Hi Ilia. > > It looks like there is a hardware bug on Fermi and Kepler where TLD > unconditionally uses the sampler from slot 0. This is supposedly fixed > in Maxwell. What I could find internally suggests the bug wasn't present > on Tesla, but let...

...Hubbard wrote: >>> On 11/22/2017 05:07 PM, Martin Peres wrote: >>>> Hey, >>>> >>>> Thanks for your answer, Andy! >>>> >>>> On 22/11/17 04:06, Ilia Mirkin wrote: >>>>> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote: >>>>> Martin's question was very long, but it boils down to this: >>>>> >>>>> How do we compute the correct values to write into the e114/e118 pwm >>>>> registers based on the VBIOS contents and current state o...

...PM, Martin Peres wrote: >>>>>> Hey, >>>>>> >>>>>> Thanks for your answer, Andy! >>>>>> >>>>>> On 22/11/17 04:06, Ilia Mirkin wrote: >>>>>>> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote: >>>>>>> Martin's question was very long, but it boils down to this: >>>>>>> >>>>>>> How do we compute the correct values to write into the e114/e118 pwm >>>>>>> registers based on the VB...

Hi Martin, I was asked to clarify a few things: (1) Are all the user reports of loud fans on Fermi-era GPUs? (2) When the VBIOS POSTs the card, it loads initial ucode onto the Falcon processor (PMU), which will do basic fan management on its own. We call this init ucode "IFR" (Init From ROM). nvidia.ko will restore the IFR ucode when unloaded. I assume the loud fan symptom occurs

On 25/11/14 22:05, Andy Ritger wrote: > On Tue, Nov 25, 2014 at 10:57:44AM -0500, Ilia Mirkin wrote: >> On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote: >>> On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote: >>>> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote: >>>>> Hi Ilia, >>>>> >>>>> Actually 0x90b8 is different...

Hi, all. Below is a link to a brief document describing some changes in NVIDIA Falcon processors ("fuc", in Nouveau-speak, IIUC) that happened in Maxwell: certain aspects of the chip will only be available to Falcon firmware images signed by NVIDIA. So far, the set of restricted things is pretty small, but I expect this list will slowly grow over future hardware generations.

On 11/22/2017 05:07 PM, Martin Peres wrote: > Hey, > > Thanks for your answer, Andy! > > On 22/11/17 04:06, Ilia Mirkin wrote: >> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote: >> Martin's question was very long, but it boils down to this: >> >> How do we compute the correct values to write into the e114/e118 pwm >> registers based on the VBIOS contents and current state of the board >> (like temperature). > &...

Hi Ben, At XDC you asked about the architecture field in NV_PMC_BOOT_0, and how to correctly determine the GPU architecture. It looks like Nouveau is getting the architecture from bits 20-27 in NV_PMC_BOOT_0 (though masking off bits 20-23). For >= NV10, the architecture field in NV_PMC_BOOT_0 is bits 24-28. E.g., the GK2xx architecture has architecture value 0x10, while GK11x has value 0xF

Hi Nouveau developers, We've posted a short document about disabling display underflow reporting on GK104, which is needed due to an incorrect setting in some production GK104 VBIOSes: ftp://download.nvidia.com/open-gpu-doc/gk104-disable-underflow-reporting/1/gk104-disable-underflow-reporting.txt Thanks, - Andy

On Wed, Dec 10, 2014 at 4:26 AM, Andy Ritger <aritger at nvidia.com> wrote: > Hi, Hey Andy, > > The VBIOS on GM20x GPUs uses a slightly updated version of the DCB. > I've posted an updated DCB spec here: > > ftp://download.nvidia.com/open-gpu-doc/DCB/2/DCB-4.x-Specification.html > > You can diff it against the previous...

On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote: > Hi Martin, Martin should have complete answers, > > I was asked to clarify a few things: > > (1) Are all the user reports of loud fans on Fermi-era GPUs? Yes. Although I believe some GK208 users are also having trouble, including yours truly. (It's b...

On Sat, Sep 27, 2014 at 3:19 AM, Andy Ritger <aritger at nvidia.com> wrote: > > Hi, all. Hey Andy, > > Below is a link to a brief document describing some changes in NVIDIA > Falcon processors ("fuc", in Nouveau-speak, IIUC) We started trying to use your names where we know them a while back. I personally think of "fu...