search for: ari_en

...v, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PCI_EXP_DEVCAP2_ARI)) + return; + + pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl); + ctrl |= PCI_EXP_DEVCTL2_ARI; + pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl); + + dev->ari_enabled = 1; + dev_info(&dev->dev, "ARI forwarding enabled.\n"); +} + int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge) { diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 9f0fa0e..593b415 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@...

...v, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PCI_EXP_DEVCAP2_ARI)) + return; + + pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl); + ctrl |= PCI_EXP_DEVCTL2_ARI; + pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl); + + dev->ari_enabled = 1; + dev_info(&dev->dev, "ARI forwarding enabled.\n"); +} + int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge) { diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 9f0fa0e..593b415 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@...

...ers/pci/ari.c @@ -0,0 +1,71 @@ +/* + * drivers/pci/ari.c + * + * Copyright (C) 2008 Intel Corporation, Yu Zhao <yu.zhao at intel.com> + * + * PCI Express Alternative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: the PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM && + dev->ari_enabled) +...

...ers/pci/ari.c @@ -0,0 +1,71 @@ +/* + * drivers/pci/ari.c + * + * Copyright (C) 2008 Intel Corporation, Yu Zhao <yu.zhao at intel.com> + * + * PCI Express Alternative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: the PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM && + dev->ari_enabled) +...

...ers/pci/ari.c @@ -0,0 +1,71 @@ +/* + * drivers/pci/ari.c + * + * Copyright (C) 2008 Intel Corporation, Yu Zhao <yu.zhao at intel.com> + * + * PCI Express Alternative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: the PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM && + dev->ari_enabled) +...

...ers/pci/ari.c @@ -0,0 +1,70 @@ +/* + * drivers/pci/ari.c + * + * Copyright (C) 2008 Intel Corporation, Yu Zhao <yu.zhao at intel.com> + * + * PCI Express Alternative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) + return; + + pos = pci_find_capability(de...

...ers/pci/ari.c @@ -0,0 +1,70 @@ +/* + * drivers/pci/ari.c + * + * Copyright (C) 2008 Intel Corporation, Yu Zhao <yu.zhao at intel.com> + * + * PCI Express Alternative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) + return; + + pos = pci_find_capability(de...

...ers/pci/ari.c @@ -0,0 +1,70 @@ +/* + * drivers/pci/ari.c + * + * Copyright (C) 2008 Intel Corporation, Yu Zhao <yu.zhao at intel.com> + * + * PCI Express Alternative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) + return; + + pos = pci_find_capability(de...

...unsigned int reset_fn:1; unsigned int is_hotplug_bridge:1; + unsigned int is_thunderbolt:1; /* Thunderbolt controller */ unsigned int __aer_firmware_first_valid:1; unsigned int __aer_firmware_first:1; unsigned int broken_intx_masking:1; @@ -2171,6 +2172,28 @@ static inline bool pci_ari_enabled(struct pci_bus *bus) return bus->self && bus->self->ari_enabled; } +/** + * pci_is_thunderbolt_attached - whether device is on a Thunderbolt daisy chain + * @pdev: PCI device to check + * + * Walk upwards from @pdev and check for each encountered bridge if it's + * pa...

On Fri, Apr 24, 2020 at 4:35 PM Peter Crowther <peter.crowther@melandra.com> wrote: > > On Fri, 24 Apr 2020 at 21:10, Mauricio Tavares <raubvogel@gmail.com> wrote: >> >> Let's say I have libvirt >> >> [root@vmhost2 ~]# virsh version >> [...] >> >> Running hypervisor: QEMU 2.12.0 >> [root@vmhost2 ~]# >> [...] > > When

Fix Thunderbolt-related issues in apple-gmux and vga_switcheroo: Patch [1/5] ("Recognize Thunderbolt devices") has already been subjected to a fair amount of scrutiny over at linux-pci@, I've submitted it 5 times total since May 2016. With luck it may be in ack-able shape now. Patch [2/5] amends apple-gmux to handle combined DP/Thunderbolt ports properly on newer MacBook Pros.

...pace access is blocked */ > unsigned int broken_parity_status:1; /* Device generates false positive > parity */ > unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting > variant */ > - unsigned int msi_enabled:1; > - unsigned int msix_enabled:1; > unsigned int ari_enabled:1; /* ARI forwarding */ > unsigned int is_managed:1; > unsigned int needs_freset:1; /* Dev requires fundamental reset */ > @@ -358,7 +356,7 @@ struct pci_dev { > struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for > resources */ > struct bin_at...

...pace access is blocked */ > unsigned int broken_parity_status:1; /* Device generates false positive > parity */ > unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting > variant */ > - unsigned int msi_enabled:1; > - unsigned int msix_enabled:1; > unsigned int ari_enabled:1; /* ARI forwarding */ > unsigned int is_managed:1; > unsigned int needs_freset:1; /* Dev requires fundamental reset */ > @@ -358,7 +356,7 @@ struct pci_dev { > struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for > resources */ > struct bin_at...

...#39;s fine with me if you want to use it there. I just don't see the benefit to having it in the core. > unsigned int __aer_firmware_first_valid:1; > unsigned int __aer_firmware_first:1; > unsigned int broken_intx_masking:1; > @@ -2171,6 +2172,28 @@ static inline bool pci_ari_enabled(struct pci_bus *bus) > return bus->self && bus->self->ari_enabled; > } > > +/** > + * pci_is_thunderbolt_attached - whether device is on a Thunderbolt daisy chain > + * @pdev: PCI device to check > + * > + * Walk upwards from @pdev and check for ea...

The wrong values are reported from pcie_bandwidth_available() which can cause problems for performance of eGPUs. This series overhauls Thunderbolt related device detection and uses the changes to change the behavior of pcie_bandwidth_available(). v2->v3: * Stop lumping all thunderbolt VSEC and USB4 devices together, introduce is_virtual_link instead * Drop unnecessary patches Mario

...g support. (Greg KH) 2, emit uevent upon the PF driver is loaded. (Greg KH) 3, put SR-IOV callback function into the 'pci_driver'. (Matthew Wilcox) 4, register SR-IOV service at the PF loading stage. 5, remove unnecessary APIs (pci_iov_enable/disable). --- [PATCH 1/13 v7] PCI: enhance pci_ari_enabled() [PATCH 2/13 v7] PCI: remove unnecessary arg of pci_update_resource() [PATCH 3/13 v7] PCI: define PCI resource names in an 'enum' [PATCH 4/13 v7] PCI: remove unnecessary condition check in pci_restore_bars() [PATCH 5/13 v7] PCI: export __pci_read_base() [PATCH 6/13 v7] PCI: make pci_a...

...g support. (Greg KH) 2, emit uevent upon the PF driver is loaded. (Greg KH) 3, put SR-IOV callback function into the 'pci_driver'. (Matthew Wilcox) 4, register SR-IOV service at the PF loading stage. 5, remove unnecessary APIs (pci_iov_enable/disable). --- [PATCH 1/13 v7] PCI: enhance pci_ari_enabled() [PATCH 2/13 v7] PCI: remove unnecessary arg of pci_update_resource() [PATCH 3/13 v7] PCI: define PCI resource names in an 'enum' [PATCH 4/13 v7] PCI: remove unnecessary condition check in pci_restore_bars() [PATCH 5/13 v7] PCI: export __pci_read_base() [PATCH 6/13 v7] PCI: make pci_a...

...g support. (Greg KH) 2, emit uevent upon the PF driver is loaded. (Greg KH) 3, put SR-IOV callback function into the 'pci_driver'. (Matthew Wilcox) 4, register SR-IOV service at the PF loading stage. 5, remove unnecessary APIs (pci_iov_enable/disable). --- [PATCH 1/13 v7] PCI: enhance pci_ari_enabled() [PATCH 2/13 v7] PCI: remove unnecessary arg of pci_update_resource() [PATCH 3/13 v7] PCI: define PCI resource names in an 'enum' [PATCH 4/13 v7] PCI: remove unnecessary condition check in pci_restore_bars() [PATCH 5/13 v7] PCI: export __pci_read_base() [PATCH 6/13 v7] PCI: make pci_a...

...int block_cfg_access:1; /* config space access is blocked */ unsigned int broken_parity_status:1; /* Device generates false positive parity */ unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ - unsigned int msi_enabled:1; - unsigned int msix_enabled:1; unsigned int ari_enabled:1; /* ARI forwarding */ unsigned int is_managed:1; unsigned int needs_freset:1; /* Dev requires fundamental reset */ @@ -358,7 +356,7 @@ struct pci_dev { struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ struct bin_attribute *res_attr_wc[DEVICE_CO...

...+{ + int i; + int pos; + u32 pgsz; + u16 ctrl, total, initial, offset, stride; + struct pci_iov *iov; + struct resource *res; + + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_IOV); + if (!pos) + return -ENODEV; + + ctrl = pci_ari_enabled(dev) ? PCI_IOV_CTRL_ARI : 0; + pci_write_config_word(dev, pos + PCI_IOV_CTRL, ctrl); + ssleep(1); + + pci_read_config_word(dev, pos + PCI_IOV_TOTAL_VF, &total); + pci_read_config_word(dev, pos + PCI_IOV_INITIAL_VF, &initial); + pci_write_config_word(dev, p...