search for: arch_timer

Hi, I''m having some problems with getting the latest linux kernel and xen build working on ARM''s Fast Model simulator ( Cortex A15 ). I tried a lot of different configurations and I''m having trouble with all of them. I got all my information from the wiki pages at http://wiki.xen.org/wiki/Xen_ARMv7_with_Virtualization_Extensions#Building_Xen_on_ARM . I was hoping

...Signed-off-by: Chen Baozi <baozich@gmail.com> Acked-by: Ian Campbell <ian.campbell@citrix.com> commit 7f2b22e9b3975650f81aa6c6d82bc716a3331fc7 Author: Chen Baozi <baozich@gmail.com> Date: Tue Aug 13 19:14:26 2013 +0800 xen/arm: Platform recognition and initialize arch_timer for the OMAP5 Signed-off-by: Chen Baozi <baozich@gmail.com> Acked-by: Ian Campbell <ian.campbell@citrix.com> commit 5f99725ce1f53c21aec71cb4de7f387136279857 Author: Chen Baozi <baozich@gmail.com> Date: Tue Aug 13 19:14:25 2013 +0800 xen/arm: Add support for de...

Hi all, this patch series introduces stolen ticks accounting for Xen on ARM. Stolen ticks are clocksource ticks that have been "stolen" from the cpu, typically because Linux is running in a virtual machine and the vcpu has been descheduled. To account for these ticks we introduce CONFIG_PARAVIRT and pv_time_ops so that we can make use of:

..._SHIFT in omap-uart.c rather than 8250-uart.h, since Linux also uses hardcoded regshift in omap-uart driver and there is no reg-shift of UART defined in OMAP5''s DT. - Separate dt_property_read_u32 introduction into a single patch. - Fix some typos. v5 <- v4: - Separate dt specified arch_timer clkfrq setup into patch #4. v4 <- v3: - Merege #4 and #5 in v3 into one patch. - Fix some coding-style and comments. v3 <- v2: - [3/5] Use bool_t as the return type of dt_property_read_u32. - [3/5] Use sizeof(*out_value) instead of hardcoded value in dt_property_read_u32. - [3/5] Fix some c...

Hi, I want to try Xen on ARMv8 Simulator. Can you please provide guidance?. I am looking for information about sources, build and procedure to launch Xen on ARMv8 Thanks & Regards Vijay

...[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] random: get_random_bytes called from start_kernel+0x2a8/0x434 with crng_init=0 [ 0.000000] arch_timer: cp15 timer(s) running at 31.25MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xe6a171046, max_idle_ns: 881590405314 ns [ 0.000002] sched_clock: 56 bits at 31MHz, resolution 32ns, wraps every 4398046511088ns [ 0.008440] Console: colour dummy devic...

...0000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=6. [ 0.000000] Tasks RCU enabled. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] arch_timer: cp15 timer(s) running at 31.25MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xe6a171046, max_idle_ns: 881590405314 ns [ 0.000003] sched_clock: 56 bits at 31MHz, resolution 32ns, wraps every 4398046511088ns [ 0.000087] Console: colour dummy devic...

Hi to all. I'm experimenting with running a https://www.zotac.com/us/product/graphics_card/geforce%C2%AE-gt-710-1gb-pcie-x-1 card on an Nvidia Jetson TX2 arm64 device. Possible? Linux kernel aarch64 5.6.10. Because Nvidia did not list drivers for this architecture, I'm experimenting with a nouveau driver. The Jetson TX2 has a default driver for the host1x framebuffer for output from the

Thanks to Thierry for finding this - applying index e14643615698..00eeaaffeae5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2369,7 +2369,7 @@ nv13b_chipset = { .imem = gk20a_instmem_new, .ltc = gp100_ltc_new, .mc = gp10b_mc_new, - .mmu = gf100_mmu_new, + .mmu = gp10b_mmu_new,

...0000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=6. [ 0.000000] Tasks RCU enabled. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] arch_timer: cp15 timer(s) running at 31.25MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xe6a171046, max_idle_ns: 881590405314 ns [ 0.000003] sched_clock: 56 bits at 31MHz, resolution 32ns, wraps every 4398046511088ns [ 0.000086] Console: colour dummy devic...

...0000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=6. [ 0.000000] Tasks RCU enabled. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] arch_timer: cp15 timer(s) running at 31.25MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xe6a171046, max_idle_ns: 881590405314 ns [ 0.000003] sched_clock: 56 bits at 31MHz, resolution 32ns, wraps every 4398046511088ns [ 0.000087] Console: colour dummy devic...