Displaying 2 results from an estimated 2 matches for "ar32regclass".
Did you mean:
gr32regclass
2008 Feb 18
0
[LLVMdev] More address registers
...electAddr().)
>
> SDOperand chain = CurDAG->getCopyToReg(Base, M68K::A3, Base);
> Base = CurDAG->getCopyFromReg(chain, M68K::A3, MVT::i32);
>
Replying to myself here.
This worked a bit better :)
const unsigned addressReg =
RegMap->createVirtualRegister(&M68K::AR32RegClass);
SDOperand chain = CurDAG->getCopyToReg(Base, addressReg, Base);
Base = CurDAG->getCopyFromReg(chain, addressReg, MVT::i32);
// Andreas
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080218/...
2008 Feb 15
2
[LLVMdev] More address registers
Hi again,
I'm finally getting some time to work on my m68k backend again. :)
I was trying to solve the problem that loads from arbitrary addresses need
to go through address registers. 68k allows flexible addressing similar to
what the x86 can do, only that the adressing base has to reside in an
address register:
move.size[b/w/l] <Displacement>(Ax, Dx * Scale[1/2/4/8]), <Dest>