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2012 Nov 14
0
[LLVMdev] TableGen: Requires in multiclass's def as well as defm
Hi, I'd like to disallow ARM's register-register preload instruction for NaCl (and keep the register-immediate), and instead of my localmod being to delete the 'rs' def from multiclass APreLoad I'd like to do the cleaner thing and have rs require IsNotNaCl. This unfortunately doesn't seem to work because the subsequent defm have their own Requires. The way preloads are set up right now makes sense and I don't think they should be changed. Do I have the wrong approach in tryin...