search for: appeng

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2009 Apr 15
1
[LLVMdev] Tablegen question
On Apr 15, 2009, at 1:11 PM, Villmow, Micah wrote: > If I force it to use v2f32 for my register class, it still fails with: > d:\hq\main\sw\appeng\tools\hpc\opencl\compiler\llvm\test > \AMDIL>TableGen. > exe -gen > -dag-isel -I../../include/ test.td > output > GPRV2F32:v2f32:$src1 MACRO_DISTANCE_FAST_v2f32: (set > GPRF32:f32:$dst, (i > ntrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, > GPRV2F32:v2f32:$sr...
2009 Apr 15
0
[LLVMdev] Tablegen question
If I force it to use v2f32 for my register class, it still fails with: d:\hq\main\sw\appeng\tools\hpc\opencl\compiler\llvm\test\AMDIL>TableGen. exe -gen -dag-isel -I../../include/ test.td > output GPRV2F32:v2f32:$src1 MACRO_DISTANCE_FAST_v2f32: (set GPRF32:f32:$dst, (i ntrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, GPRV2F32:v2f32:$src1)) TableGen.exe: In MACRO_DISTANCE_...
2009 Apr 15
2
[LLVMdev] Tablegen question
On Apr 15, 2009, at 11:15 AM, Villmow, Micah wrote: > I still think there is a bug somewhere, but not sure where yet. > This is what is generated in intrinsic.gen: > case Intrinsic::opencl_math_fdistance: // > llvm.opencl.math.fdistance > ResultTy = Type::FloatTy; > ArgTys.push_back(Tys[0]); > ArgTys.push_back(Tys[0]); > break; OK. That looks right to me.
2008 Oct 07
2
[LLVMdev] Multi instruction pattern help
...nt (f32 (dp_to_fp (f64 GPR:$src0))))>; Which when it runs across a 64bit float, it does a double to single conversion, and then calls the 32bit float to int routine. However, tablegen fails with the following error: 1>anonymous.2: (fp_to_uint:isInt GPR:f64:$src0) 1>f:\hq\main\sw\appeng\tools\hpc\opencl\llvm\win32\AMDIL\..\bin\Win32\De bug\TableGen.exe: In anonymous.2: Could not infer all types in pattern! Is it possible to get an example explaining what is going on and how the patterns are used? Maybe show how you can go from three different patterns to a single pattern using...
2008 Oct 07
3
[LLVMdev] Multi instruction pattern help
...;i32 ==> f64->f32 + f32->i32 def : Pat<(i32 (fp_to_uint (f64 GPR:$src0))), (i32 (fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0)))))>; 1>Building AMDil.td instruction selector implementation with tblgen 1>(fp_to_uint:i32 (dp_to_fp:f32 GPR:f64:$src0)) 1>f:\hq\main\sw\appeng\tools\hpc\opencl\llvm\win32\AMDIL\..\bin\Win32\De bug\TableGen.exe: Unknown node in result pattern! both fp_to_uint and dp_to_fp are used in other patterns, so I am sure that the patterns separate from each other work and the above pattern passes the instruction information stage, so not sure why...
2002 Apr 11
0
Feature request for sys/iso-linux
...quest for sys/iso-linux: A function very much like lilos 'single-key' directive, Which only allows 1 character labels (but there should be plenty of them too ;o) Config-file: DEFAULT l PROMPT 1 TIMEOUT 50 SINGLEKEY LABEL l KERNEL vmlinux APPEND initrd=initrd.img LABEL w KERNEL MEMDISK APPENG initrd=winboot.img So when pressing w you get a windows boot-disk. Yours. -- Morten B?geskov (email: morten at bogeskov.dk) PS. Your software has helped me a great deal in making a rescue-cd that can boot from scsi cdrom drives (initrds has an ugly way of growing when you need scsi-support).
2008 Oct 07
0
[LLVMdev] Multi instruction pattern help
On Oct 6, 2008, at 5:42 PM, Villmow, Micah wrote: > I am trying to get a multi instruction pattern to work and seem to > be running into trouble. > The problem itself is fairly simple. I need to go from 64bit floats > to 32bit integers. As the backend doesn’t support this natively but > has a way of converting it, I’d prefer to get this working via > tablegen. > >
2008 Oct 07
0
[LLVMdev] Multi instruction pattern help
...f32 + f32->i32 > def : Pat<(i32 (fp_to_uint (f64 GPR:$src0))), > (i32 (fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0)))))>; > 1>Building AMDil.td instruction selector implementation with tblgen > 1>(fp_to_uint:i32 (dp_to_fp:f32 GPR:f64:$src0)) > 1>f:\hq\main\sw\appeng\tools\hpc\llvm\win32\AMDIL\..\bin\Win32\Debug > \TableGen.exe: Unknown node in result pattern! > both fp_to_uint and dp_to_fp are used in other patterns, so I am > sure that the patterns separate from each other work and the above > pattern passes the instruction information stage,...