search for: aper_base

...e-linux-2.6.12/arch/x86_64/kernel/aperture.c 2005-06-17 12:48:29.000000000 -0700 +++ linux-2.6-xen-sparse/arch/xen/x86_64/kernel/aperture.c 2006-01-12 10:53:17.000000000 -0800 @@ -83,7 +83,7 @@ printk("Aperture from %s beyond 4GB. Ignoring.\n",name); return 0; } - if (e820_mapped(aper_base, aper_base + aper_size, E820_RAM)) { + if (0 && e820_mapped(aper_base, aper_base + aper_size, E820_RAM)) { printk("Aperture from %s pointing to e820 RAM. Ignoring.\n",name); return 0; } --- pristine-linux-2.6.12/arch/x86_64/kernel/pci-gart.c 2005-06-17 12:48:29.00000...

...tch = radeon_switcheroo_can_switch, }; +static bool radeon_is_boot_device(struct pci_dev *pdev) +{ + struct drm_device *dev = pci_get_drvdata(pdev); + struct radeon_device *rdev = dev->dev_private; + struct radeon_mc *gmc = &rdev->mc; + + return drm_aperture_contain_firmware_fb(gmc->aper_base, gmc->aper_size); +} + /** * radeon_device_init - initialize the driver * @@ -1425,7 +1435,7 @@ int radeon_device_init(struct radeon_device *rdev, /* if we have > 1 VGA cards, then disable the radeon VGA resources */ /* this will fail for cards that aren't VGA class devices, just...

...*amdgpu_dev_attributes[] = { NULL }; +static bool amdgpu_is_boot_device(struct pci_dev *pdev) +{ + struct drm_device *dev = pci_get_drvdata(pdev); + struct amdgpu_device *adev = drm_to_adev(dev); + struct amdgpu_gmc *gmc = &adev->gmc; + + return drm_aperture_contain_firmware_fb(gmc->aper_base, gmc->aper_size); +} + /** * amdgpu_device_init - initialize the driver * @@ -4082,7 +4091,8 @@ int amdgpu_device_init(struct amdgpu_device *adev, /* this will fail for cards that aren't VGA class devices, just * ignore it */ if ((adev->pdev->class >> 8) == PCI_CLASS_...

From: Sui Jingfeng <suijingfeng at loongson.cn> Currently, the default VGA device selection is not perfect. Potential problems are: 1) This function is a no-op on non-x86 architectures. 2) It does not take the PCI Bar may get relocated into consideration. 3) It is not effective for the PCI device without a dedicated VRAM Bar. 4) It is device-agnostic, thus it has to waste the effort to

...ble fw */ > - ret = drm_agp_enable(rdev->ddev, mode); > - if (ret) { > - DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); > - drm_agp_release(rdev->ddev); > - return ret; > - } > - > - rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; The field agp_base seems to be used to program HW registers. Yet I cannot find its initialization after applying the patchset. Does some of this removed setup code need to be moved elsewhere instead? Best regards Thomas > - rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size...

...mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ - ret = drm_agp_enable(rdev->ddev, mode); - if (ret) { - DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); - drm_agp_release(rdev->ddev); - return ret; - } - - rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; - rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20; - rdev->mc.gtt_start = rdev->mc.agp_base; - rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; - dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", - rdev->mc.gtt_siz...

Hi guys, Well let's face it AGP is a total headache to maintain and dead for at least 10+ years. We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc... So the idea here is to just go ahead and remove the support

...); > - if (ret) { > - DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); > - drm_agp_release(rdev->ddev); > - return ret; > - } > - > - rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; > - rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20; > - rdev->mc.gtt_start = rdev->mc.agp_base; > - rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; > - dev_info(rdev->dev, "GTT: %lluM 0x%08ll...

Hello, I have my work on the nv vpe video decoder in a functional state. In case you didn't know this decoder accelerates mpeg2 video at the idct/mc level. I have verified that it works on nv40 hardware. I believe it works on nv30 hardware (and maybe some earlier hardware), but I cannot verify since I have none. I will reply with patches against the kernel, drm, ddx and mesa for