search for: aper_bar

...t;mmio.va = pci_ioremap_bar(pdev, mdev->ops->mmio_bar); > + if (!mdev->mmio.va) { > + dev_err(&pdev->dev, "Cannot remap MMIO BAR\n"); > + rc = -EIO; > + goto release_regions; > + } > + > + mdev->aper.pa = pci_resource_start(pdev, mdev->ops->aper_bar); > + mdev->aper.len = pci_resource_len(pdev, mdev->ops->aper_bar); > + mdev->aper.va = ioremap_wc(mdev->aper.pa, mdev->aper.len); > + if (!mdev->aper.va) { > + dev_err(&pdev->dev, "Cannot remap Aperture BAR\n"); > + rc = -EIO; > + goto unm...

...t;mmio.va = pci_ioremap_bar(pdev, mdev->ops->mmio_bar); > + if (!mdev->mmio.va) { > + dev_err(&pdev->dev, "Cannot remap MMIO BAR\n"); > + rc = -EIO; > + goto release_regions; > + } > + > + mdev->aper.pa = pci_resource_start(pdev, mdev->ops->aper_bar); > + mdev->aper.len = pci_resource_len(pdev, mdev->ops->aper_bar); > + mdev->aper.va = ioremap_wc(mdev->aper.pa, mdev->aper.len); > + if (!mdev->aper.va) { > + dev_err(&pdev->dev, "Cannot remap Aperture BAR\n"); > + rc = -EIO; > + goto unm...

...*/ +struct mic_device { + struct mic_mw mmio; + struct mic_mw aper; + enum mic_hw_family family; + struct mic_hw_ops *ops; + int id; + enum mic_stepping stepping; + const struct attribute_group **attr_group; + struct device *sdev; +}; + +/** + * struct mic_hw_ops - MIC HW specific operations. + * @aper_bar: Aperture bar resource number. + * @mmio_bar: MMIO bar resource number. + * @read_spad: Read from scratch pad register. + * @write_spad: Write to scratch pad register. + */ +struct mic_hw_ops { + u8 aper_bar; + u8 mmio_bar; + u32 (*read_spad)(struct mic_device *mdev, unsigned int idx); + void (*wri...

...ame[20]; + struct mic_mw mmio; + struct pci_dev *pdev; + enum mic_hw_family family; + struct mic_hw_ops *ops; + int id; + enum mic_stepping stepping; + struct attribute_group attr_group; + struct device *sdev; + struct mic_mw aper; +}; + +/** + * struct mic_hw_ops - MIC HW specific operations. + * @aper_bar: Aperture bar resource number. + * @mmio_bar: MMIO bar resource number. + * @init: Initialize the MIC HW information. + * @read_spad: Read from scratch pad register. + * @write_spad: Write to scratch pad register. + */ +struct mic_hw_ops { + u8 aper_bar; + u8 mmio_bar; + void (*init)(struct mic_dev...

...ce *mdev); + void (*disable_interrupts)(struct mic_device *mdev); + void (*program_msi_to_src_map) (struct mic_device *mdev, + int idx, int intr_src, bool set); + u32 (*read_msi_to_src_map) (struct mic_device *mdev, + int idx); +}; + +/** + * struct mic_hw_ops - MIC HW specific operations. + * @aper_bar: Aperture bar resource number. + * @mmio_bar: MMIO bar resource number. + * @init: Initialize the MIC HW information. + * @read_spad: Read from scratch pad register. + * @write_spad: Write to scratch pad register. + * @reset: Reset the remote processor. + * @reset_fw_ready: Reset firmware ready fie...

ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:

ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

...nload. + * @send_firmware_intr: Send an interrupt to the card firmware. + * @load_mic_fw: Load firmware segments required to boot the card + * into card memory. This includes the kernel, command line, ramdisk etc. + * @get_postcode: Get post code status from firmware. */ struct mic_hw_ops { u8 aper_bar; @@ -98,6 +139,12 @@ struct mic_hw_ops { void (*write_spad)(struct mic_device *mdev, unsigned int idx, u32 val); void (*send_intr)(struct mic_device *mdev, int doorbell); u32 (*ack_interrupt)(struct mic_device *mdev); + void (*reset)(struct mic_device *mdev); + void (*reset_fw_ready)(struct m...

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after