Displaying 3 results from an estimated 3 matches for "and32ri8".
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add32ri8
2017 Aug 02
3
[InstCombine] Simplification sometimes only transforms but doesn't simplify instruction, causing side effect in other pass
...he proper
places to do the reversal transformation. We need Live Interval
information to justify the transformation, however currently live
Interval information is not ready in both places.
* The pattern matching looks quite ad hoc on machine IR. I need to
figure out we can replace %vreg0 in "AND32ri8 %vreg0<tied0>, 31" with
%vreg1 by looking at the copy chain starting from %vreg9<def> = COPY
%vreg0 to %vreg1<def> = MOVZX32rr8 %vreg9 first, and at the same time,
after replacing vreg0 with %vreg1, vreg0 becomes dead at the other
AND32ri and we can save an instruction there....
2017 Aug 02
3
[InstCombine] Simplification sometimes only transforms but doesn't simplify instruction, causing side effect in other pass
...mation. We need Live Interval
>> information to justify the transformation, however currently live
>> Interval information is not ready in both places.
>>
>> * The pattern matching looks quite ad hoc on machine IR. I need to
>> figure out we can replace %vreg0 in "AND32ri8 %vreg0<tied0>, 31" with
>> %vreg1 by looking at the copy chain starting from %vreg9<def> = COPY
>> %vreg0 to %vreg1<def> = MOVZX32rr8 %vreg9 first, and at the same time,
>> after replacing vreg0 with %vreg1, vreg0 becomes dead at the other
>> AND32ri a...
2017 Aug 02
2
[InstCombine] Simplification sometimes only transforms but doesn't simplify instruction, causing side effect in other pass
...he reversal transformation. We need Live Interval
> information to justify the transformation, however currently live
> Interval information is not ready in both places.
>
> * The pattern matching looks quite ad hoc on machine IR. I need to
> figure out we can replace %vreg0 in "AND32ri8 %vreg0<tied0>, 31" with
> %vreg1 by looking at the copy chain starting from %vreg9<def> = COPY
> %vreg0 to %vreg1<def> = MOVZX32rr8 %vreg9 first, and at the same time,
> after replacing vreg0 with %vreg1, vreg0 becomes dead at the other
> AND32ri and we can save a...