search for: add32ri8

...CFI_INSTRUCTION <call frame instruction> CALLpcrel32 <ga:@debugPointer>, <regmask %BH %BL %BP %BPL %BX %DI %DIL %EBP %EBX %EDI %ESI %SI %SIL>, %ESP<imp-use>, %ESP<imp-def>, %EAX<imp-def,dead>, %EDX<imp-def,dead> %ESP<def,tied1> = ADD32ri8 %ESP<tied0>, 4, %EFLAGS<imp-def,dead> CFI_INSTRUCTION <call frame instruction> PUSHi32 <ga:@foo>, %ESP<imp-def>, %ESP<imp-use> CFI_INSTRUCTION <call frame instruction> CALLpcrel32 <ga:@debugInt>, <regmask %BH %BL %BP...

...%bb.preheader.i271 It gets converted to the following MachineBasicBlock __exp.exit (0x8c58628, LLVM BB @0x8c1c558, ID#21): Predecessors according to CFG: 0x8c53a90 0x8c55b50 MOV32mi %EBP, 1, %NOREG, -224, <ga:DataStore> %EAX = MOV32rm %EBP, 1, %NOREG, -224 %EAX = ADD32ri8 %EAX, 40 MOV32mi %EAX, 1, %NOREG, 0, 0 MOV32mi %EAX, 1, %NOREG, 4, 1075576832 %ESP = SUB32ri %ESP, 16 %XMM0 = CVTSI2SDrr %EDI MOVSDmr %ESP, 1, %NOREG, 0, %XMM0 MOV32mr %EBP, 1, %NOREG, -268, %ESP ADD32mi8 %EBP, 1, %NOREG, -268, 4294967288...

...instruction> >> CALLpcrel32 <ga:@debugPointer>, <regmask %BH %BL %BP %BPL %BX >> %DI %DIL %EBP %EBX %EDI %ESI %SI %SIL>, %ESP<imp-use>, %ESP<imp-def>, >> %EAX<imp-def,dead>, %EDX<imp-def,dead> >> %ESP<def,tied1> = ADD32ri8 %ESP<tied0>, 4, %EFLAGS<imp-def,dead> >> CFI_INSTRUCTION <call frame instruction> >> PUSHi32 <ga:@foo>, %ESP<imp-def>, %ESP<imp-use> >> CFI_INSTRUCTION <call frame instruction> >> CALLpcrel32 <ga:@d...

Emitting calls to these functions (written in an .ll file linked in) works fine, and does the right thing. %Any = type { i8*, i32 } define dllexport void @setGlobal(%Any* %ptr, %Any %value) { store %Any %value, %Any* %ptr ret void } define dllexport %Any @getGlobal(%Any* %ptr) { %val = load %Any, %Any* %ptr ret %Any %val } Trying to replace the setGlobal call with what should be

...; CALLpcrel32 <ga:@debugPointer>, <regmask %BH %BL %BP %BPL %BX >>>> %DI %DIL %EBP %EBX %EDI %ESI %SI %SIL>, %ESP<imp-use>, %ESP<imp-def>, >>>> %EAX<imp-def,dead>, %EDX<imp-def,dead> >>>> %ESP<def,tied1> = ADD32ri8 %ESP<tied0>, 4, %EFLAGS<imp-def,dead> >>>> CFI_INSTRUCTION <call frame instruction> >>>> PUSHi32 <ga:@foo>, %ESP<imp-def>, %ESP<imp-use> >>>> CFI_INSTRUCTION <call frame instruction> >>>&g...

...t;ga:@debugPointer>, <regmask %BH %BL %BP %BPL >>>>>> %BX %DI %DIL %EBP %EBX %EDI %ESI %SI %SIL>, %ESP<imp-use>, %ESP<imp-def>, >>>>>> %EAX<imp-def,dead>, %EDX<imp-def,dead> >>>>>> %ESP<def,tied1> = ADD32ri8 %ESP<tied0>, 4, >>>>>> %EFLAGS<imp-def,dead> >>>>>> CFI_INSTRUCTION <call frame instruction> >>>>>> PUSHi32 <ga:@foo>, %ESP<imp-def>, %ESP<imp-use> >>>>>> CFI_INSTRUCT...

...b.ret.exitStub.ret.exitStub.ret7> %EAX = MOV32rm %EBP, 1, %NOREG, -268 %ESI = MOV32rm %EAX, 1, %NOREG, 0 %ESP = SUB32ri %ESP, 8 MOV32mr %ESP, 1, %NOREG, 4, %ESI MOV32mi %ESP, 1, %NOREG, 0, <ga:str> CALLpcrel32 <ga:printf> %ESP = ADD32ri8 %ESP, 8 Successors according to CFG: 0xa60cb58 trueBlock.ret (0xa60cb58, LLVM BB @0xa5d88c8, ID#83): Predecessors according to CFG: 0xa5f4148 %EAX = MOV32rr %ESI %EBX = MOV32rm %EBP, 1, %NOREG, -12 %EDI = MOV32rm %EBP, 1, %NOREG, -8 %ESI = MOV32rm %EBP, 1, %...

...P points to the safe stack at the start of each function. The pass tracks the flow of addresses derived from ESP to other registers throughout the function to determine whether any given memory operand refers to the safe stack. It assumes that only specific types of instructions (LEA32r, MOV32rr, ADD32ri8, ADD32ri) are used to compute pointers to the safe stack. It also attempts to track the flow of addresses through register spills and fills. The pass performs a single pass over each instruction in each basic block, recording information about the flow of safe stack addresses through registers an...

Hi all, I changed the code that checks whether a tail call is really eligible for optimization so that it performs the check/fix in SelectionDAGISel.cpp:BuildSelectionDAG() as suggest by Evan. Also eliminated an error that caused the remaining failing test cases in the test-suite. The results look very nice (on darwin x86, r42486). The same number (46) of failing test cases on patched

On Tue, 25 Sep 2007, Evan Cheng wrote: >> the stack adjustment only fastcc was not one of them. Now that fastcc >> can cause tail call optimization i had to change the convention from >> caller pops arguments to callee pops arguments in order to allow tail >> call optimization in a general way. > > Hmmm. Ok. So this is due to X86CallingConv.td changes? Unfortunately

...unsigned StackPtr) { + int32_t Offset = 0; + if (MBBI != MBB.begin()) { + MachineBasicBlock::iterator PI = prior(MBBI); + unsigned Opc = PI->getOpcode(); + if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 || + Opc == X86::ADD32ri || Opc == X86::ADD32ri8) && + PI->getOperand(0).getReg() == StackPtr){ + Offset += PI->getOperand(2).getImm(); + MBB.erase(PI); + } + } + return Offset; +} + Seems like the previous chunk can be changed to use this function with some refactoring? + +static cl::opt<bool> + P...