Displaying 3 results from an estimated 3 matches for "amdilregisterinfo".
2010 May 03
2
[LLVMdev] Default behavior of DeadMachineInstructionElim deletes all instructions
On Apr 29, 2010, at 2:06 PM, Villmow, Micah wrote:
> Ping. Anyone have any idea on how to fix this?
Does your getAllocatableSet() return a BitVector that is at least getNumRegs() bits long? Otherwise this doesn't work:
BitVector NonAllocatableRegs = TRI->getAllocatableSet(MF);
NonAllocatableRegs.flip();
2010 May 03
0
[LLVMdev] Default behavior of DeadMachineInstructionElim deletes all instructions
Jakob,
Here is my implementation of getAllocatableSet:
BitVector
AMDILRegisterInfo::getAllocatableSet(const MachineFunction& MF,
const TargetRegisterClass *RC = NULL) const
{
BitVector Allocatable(getNumRegs());
Allocatable.clear();
return Allocatable;
}
Micah
-----Original Message-----
From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk]
Sent: Monday, May 03, 201...
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...lib/Target/AMDGPU/AMDILNodes.td
> llvm/trunk/lib/Target/AMDGPU/AMDILOperands.td
> llvm/trunk/lib/Target/AMDGPU/AMDILPatterns.td
> llvm/trunk/lib/Target/AMDGPU/AMDILPeepholeOptimizer.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDILProfiles.td
> llvm/trunk/lib/Target/AMDGPU/AMDILRegisterInfo.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDILRegisterInfo.h
> llvm/trunk/lib/Target/AMDGPU/AMDILRegisterInfo.td
> llvm/trunk/lib/Target/AMDGPU/AMDILSIDevice.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDILSIDevice.h
> llvm/trunk/lib/Target/AMDGPU/AMDILSubtarget.cpp
> ll...