search for: ahmad

Displaying 20 results from an estimated 231 matches for "ahmad".

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2014 Dec 13
2
[LLVMdev] Vectorization factor limitation in Loop Vectorizer
...we modify the VF calculation for targets/subtargets using TTI where higher VF is supported The vectorizer’s scope will become wider. Did/do you foresee any issue with this? Thanks, Shahid From: Nadav Rotem [mailto:nrotem at apple.com] Sent: Saturday, December 13, 2014 2:47 AM To: Shahid, Asghar-ahmad Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Vectorization factor limitation in Loop Vectorizer Hi Shahid, On Dec 10, 2014, at 10:48 PM, Shahid, Asghar-ahmad <Asghar-ahmad.Shahid at amd.com<mailto:Asghar-ahmad.Shahid at amd.com>> wrote: Hi Nadav/Devs I am exploring Loop Vectori...
2013 Jan 17
4
[LLVMdev] Migrate Project Build system to LLVM BitCode
...2. opt -o optmerged.bc -load /path/to/Mypass.so -mypass < mergedbc.bc 3. llc -o .libs/mergedbc.s .libs/mergedbc.bc 4. gcc -g -O2 -o .libs/mergedexe .libs/mergedbc.s -pthread -Wl,--export-dynamic .libs/lib1.a -lssl -lcrypto -ldl -pthread .libs/lib2.so Thanks. Ahmad -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130117/02479a97/attachment.html>
2007 Feb 13
4
Generating MVN Data
...to generate multivariate normal data in R for a given covariance matrix, i.e. my generated data must have the given covariance matrix. I know the rmvnorm command is to be used but may be I am failing to properly assign the covariance matrix. Any help will be greatly appreciated thanks. M. R. Ahmad
2015 May 04
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...absd/hadd and sad are compatible with the discussions going on in other threads, for example my thread about min and max. Given that those two intrinsics are fairly trivial to match , I don't see the need to have two different canonical forms. James On Mon, 4 May 2015 at 07:55, Shahid, Asghar-ahmad < Asghar-ahmad.Shahid at amd.com> wrote: > Hi Devs, > > Pinging..., as didn't get any response yet. Or shall I assume it is > acceptable to all? > > Regards, > Shahid > > > -----Original Message----- > > From: llvmdev-bounces at cs.uiuc.edu [mailto:llv...
2013 Jan 17
0
[LLVMdev] Migrate Project Build system to LLVM BitCode
Hi Ahmad, If the Makefile contains only this command, then it is not worth spending time on GoldPlugin. If you are building a large project, then it will be simpler to use GoldPlugin. The steps you are using seem right. You can possibly combine the last two steps (3&4) using only 1 clang command....
2018 Nov 12
2
Convert Register Names to String
...r. The code that you mentioned, seems to generate the IR. You mean I should reuse the code to extract and output the register names in a file. Next, I should postprocess the file in my own pass? Regards. On Mon, 12 Nov 2018 at 13:09, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Ahmad, > > On Sun, 11 Nov 2018 at 13:39, Ahmad Nouralizadeh Khorrami via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > I want to do a cutomized points-to analysis on IR. Suppose that we have: > > %91 = bitcast i8* %90 to %struct.demux_packet*, !dbg !2688 > > > &gt...
2015 May 04
2
[LLVMdev] Load value and broadcast in LLVM
...so much for your response. You suggested approach is what I am right now using. However, it seems that the overhead is a little bit high because we are introducing two more instructions. I was wondering if there was a cheaper way to do it. Best, Zhi On Mon, May 4, 2015 at 2:12 AM, Shahid, Asghar-ahmad < Asghar-ahmad.Shahid at amd.com> wrote: > Hi Zhi, > > > > If I get your question correctly, Yes, you can do it by using the > IRBuilder’s CreateVectorSplat() API. > > > > /// \brief Return a vector value that contains \arg V broadcasted to \p > > ///...
2015 May 06
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...else? BTW, now my plan is to just add the two intrinsics for 'absolute difference' and 'horizontal add'. Regards, Shahid > -----Original Message----- > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Wednesday, May 06, 2015 3:22 PM > To: Shahid, Asghar-ahmad > Cc: James Molloy; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics > > On 6 May 2015 at 06:43, Shahid, Asghar-ahmad <Asghar- > ahmad.Shahid at amd.com> wrote: > > That’s right. I agree with your *pattern vs complexity* thinki...
2018 Aug 08
3
Error Calling eraseFromParent()
...LLVM with this > code in Debug Mode or is it simply null pointer dereference? > On a side note, usually when doing transforms similar to yours I use > IRBuilder’s CreateXXX followed by a ReplaceInstWithInst which works > perfectly fine for me. > > Zhang > > 在 2018年8月9日,00:29,Ahmad Nouralizadeh <ahmadnouralizadeh at gmail.com> 写道: > > Hi. Thanks. I changed the code but the problem exists. This is my new code > which is again very simple: > ... > bool runOnFunction(Function &F) override { > > vector<Instruction *> dels; > dels.clear(); &...
2013 Jan 22
2
[LLVMdev] Utility function to identify user defined function
...#39;foo' user defined function? If there is no such utility function then I am thinking to do this in the following way: bool testFoo(CallInst *CI) { Function *Callee = CI->getCalledFunction(); if (Callee->getName() == "foo") return true; return false; } Thanks. Cheers, Ahmad -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130122/c153c4cb/attachment.html>
2013 Feb 22
1
[LLVMdev] llvm-ar llvm-link
Hi Ahmad, Yes, merging works good. However, my problem is like this - I have a C library which consists of 1000's of functions spread through various files. The functions do not have dependency amoung each other. I want to link only relavant files( files which have functions called from my application...
2006 Dec 27
5
plotting time series with zoo pckg
Hi all, I am using the zoo package to plot time series. I have a problem with formatting the axes. my zoo object (z) looks like the following. c1 1992-01-10 21 1992-01-17 34 1992-01-24 33 1992-01-31 41 1992-02-07 39 1992-02-14 38 1992-02-21 37 1992-02-28 28 1992-03-06 33 1992-03-13 40
2013 Jan 03
0
[LLVMdev] Opt error
Hi Ahmad, On 03/01/13 16:26, Hassan, Ahmad wrote: > Hi Team, > > I am migrating one of the Pass that was written for llvm2.2 or older to llvm3.1. > The code snippet looks like the following: > > Constant *func; > > void add( Module *M) { > > func = M->getOrInsertFunction(...
2005 Mar 17
3
extension.conf dialplan
...ny number like 923335224005 or 92512213248 at the moment when i am trying to dial 40923335224005 asterisk is dialing Executing Dial("OH323/R11429", "OH323/40923335224005") but i want him to dial Executing Dial("OH323/R11429", "OH323/923335224005") Kamran Ahmad __________________________________ Do you Yahoo!? Yahoo! Mail - Find what you need with new enhanced search. http://info.mail.yahoo.com/mail_250
2013 Jan 03
2
[LLVMdev] Opt error
...!"' failed. In older llvm, I had the following line: CallInst::Create(func, Opts, Opts , "", newBB); Which I have now modified for llvm3.1 to: CallInst::Create(func, makeArrayRef(Opts, 1) , "", newBB); Please can anyone tell the reason of this opt error? Thanks. --Ahmad -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130103/0b1b5c1c/attachment.html>
2015 May 06
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...rn vs complexity* thinking. So I would drop llvm.sad() and go ahead with the remaining two. Does it make sense in general? Regards, Shahid > -----Original Message----- > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Tuesday, May 05, 2015 8:40 PM > To: Shahid, Asghar-ahmad > Cc: James Molloy; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics > > On 5 May 2015 at 15:41, Shahid, Asghar-ahmad <Asghar- > ahmad.Shahid at amd.com> wrote: > > With llvm.sad() intrinsic: > > VC1 (Vector Cost) = Cost...
2015 May 05
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
On 4 May 2015 at 08:37, Shahid, Asghar-ahmad <Asghar-ahmad.Shahid at amd.com> wrote: > My worry is regarding the query for cost calculation for specific SAD > instructions such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer. Hi Shahid, The vectorizer's cost model has the ability to return different costs for the same ins...
2012 Oct 23
4
Disable rm on sftp
...ring(NULL); debug3("request %u: remove", id); logit("remove name \"%s\"", name); status = SSH2_FX_PERMISSION_DENIED; send_status(id, status); xfree(name); } Am I doing it right? because it's not working and I don't know why. Thanks a lot. -- Best Regards, Ahmad Zayed
2013 Jan 17
1
[LLVMdev] Migrate Project Build system to LLVM BitCode
...39; then I get /usr/bin/ld: /usr/local/bin/../lib/LLVMgold.so: error loading plugin /usr/bin/ld: /usr/local/bin/../lib/LLVMgold.so: error in plugin cleanup (ignored) clang: error: linker command failed with exit code 1 It works fine if I use 'gcc' in step 4 for produce executable. Cheers, Ahmad Ciao, Duncan. > > Thanks. > > Ahmad > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > ________________________...
2016 May 12
3
sum elements in the vector
...truction.However, you can do it without intrinsic by pattern matching the LLVM-IRs representing “sum of elements in vector” to your particular instruction in DAGCombiner. Regards, Shahid From: Rail Shafigulin [mailto:rail at esenciatech.com] Sent: Monday, May 09, 2016 11:59 PM To: Shahid, Asghar-ahmad; llvm-dev Cc: Das, Dibyendu Subject: Re: [llvm-dev] sum elements in the vector I'm a little confused. Here is why. I was able to add a vector add instruction to my target without using any intrinsics and without adding any new instructions to LLVM. So here is my question: how come I managed t...