Displaying 20 results from an estimated 25 matches for "address_lo".
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address_hi
2012 Sep 11
1
[PATCH 3/3] VT-d: use msi_compose_msg()
...VERY_MODE != dest_LowestPrio) ?
- MSI_DATA_DELIVERY_FIXED:
- MSI_DATA_DELIVERY_LOWPRI;
-
- /* Follow MSI setting */
+ msi_compose_msg(desc, &msg);
+ /* Are these overrides really needed? */
if (x2apic_enabled)
msg.address_hi = dest & 0xFFFFFF00;
- msg.address_lo = (MSI_ADDRESS_HEADER << (MSI_ADDRESS_HEADER_SHIFT + 8));
- msg.address_lo |= INT_DEST_MODE ? MSI_ADDR_DESTMODE_LOGIC:
- MSI_ADDR_DESTMODE_PHYS;
- msg.address_lo |= (INT_DELIVERY_MODE != dest_LowestPrio) ?
- MSI_ADDR_REDIRECTION_CPU:
-...
2012 Oct 02
3
[PATCH] VT-d: make remap_entry_to_msi_msg() return consistent message
...vtd/intremap.c
+++ b/xen/drivers/passthrough/vtd/intremap.c
@@ -504,7 +504,11 @@ static int remap_entry_to_msi_msg(
MSI_ADDR_REDIRECTION_CPU:
MSI_ADDR_REDIRECTION_LOWPRI);
if ( x2apic_enabled )
+ {
msg->dest32 = iremap_entry->lo.dst;
+ msg->address_lo |=
+ (iremap_entry->lo.dst & 0xff) << MSI_ADDR_DEST_ID_SHIFT;
+ }
else
msg->address_lo |=
((iremap_entry->lo.dst >> 8) & 0xff ) << MSI_ADDR_DEST_ID_SHIFT;
_______________________________________________
Xen-devel maili...
2014 Jul 04
2
How to check for proper MSI support?
...tate != PCI_D0) {
> /* Don't touch the hardware now */
> } else if (entry->msi_attrib.is_msix) {
> void __iomem *base;
> base = entry->mask_base +
> entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
>
> writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
> writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
> writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
> ......
>
>> shouldn't. I don't know all the details about MSI, but doesn't the CPU
>> or...
2009 May 20
0
[PATCHv2-RFC 2/2] qemu-kvm: use common code for assigned msix
...if (!assigned_dev->entry) {
+ assigned_dev->msi_entry = calloc(1, sizeof(struct kvm_irq_routing_entry));
+ if (!assigned_dev->msi_entry) {
perror("assigned_dev_update_msi: ");
return;
}
- assigned_dev->entry->u.msi.address_lo =
+ assigned_dev->msi_entry->u.msi.address_lo =
*(uint32_t *)(pci_dev->config + pci_dev->cap.start +
PCI_MSI_ADDRESS_LO);
- assigned_dev->entry->u.msi.address_hi = 0;
- assigned_dev->entry->u.msi.data = *(u...
2009 May 20
0
[PATCHv2-RFC 2/2] qemu-kvm: use common code for assigned msix
...if (!assigned_dev->entry) {
+ assigned_dev->msi_entry = calloc(1, sizeof(struct kvm_irq_routing_entry));
+ if (!assigned_dev->msi_entry) {
perror("assigned_dev_update_msi: ");
return;
}
- assigned_dev->entry->u.msi.address_lo =
+ assigned_dev->msi_entry->u.msi.address_lo =
*(uint32_t *)(pci_dev->config + pci_dev->cap.start +
PCI_MSI_ADDRESS_LO);
- assigned_dev->entry->u.msi.address_hi = 0;
- assigned_dev->entry->u.msi.data = *(u...
2009 May 11
0
[PATCH 2/2] qemu-kvm: use common code for assigned msix
...if (!assigned_dev->entry) {
+ assigned_dev->msi_entry = calloc(1, sizeof(struct kvm_irq_routing_entry));
+ if (!assigned_dev->msi_entry) {
perror("assigned_dev_update_msi: ");
return;
}
- assigned_dev->entry->u.msi.address_lo =
+ assigned_dev->msi_entry->u.msi.address_lo =
*(uint32_t *)(pci_dev->config + pci_dev->cap.start +
PCI_MSI_ADDRESS_LO);
- assigned_dev->entry->u.msi.address_hi = 0;
- assigned_dev->entry->u.msi.data = *(u...
2009 May 11
0
[PATCH 2/2] qemu-kvm: use common code for assigned msix
...if (!assigned_dev->entry) {
+ assigned_dev->msi_entry = calloc(1, sizeof(struct kvm_irq_routing_entry));
+ if (!assigned_dev->msi_entry) {
perror("assigned_dev_update_msi: ");
return;
}
- assigned_dev->entry->u.msi.address_lo =
+ assigned_dev->msi_entry->u.msi.address_lo =
*(uint32_t *)(pci_dev->config + pci_dev->cap.start +
PCI_MSI_ADDRESS_LO);
- assigned_dev->entry->u.msi.address_hi = 0;
- assigned_dev->entry->u.msi.data = *(u...
2014 Jul 04
0
How to check for proper MSI support?
.../* Don't touch the hardware now */
>> } else if (entry->msi_attrib.is_msix) {
>> void __iomem *base;
>> base = entry->mask_base +
>> entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
>>
>> writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
>> writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
>> writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
>> ......
>>
>>> shouldn't. I don't know all the details about MSI, but doesn't...
2011 Sep 20
0
[PATCH 4/4] x86: split MSI IRQ chip
...+ {
+ spin_unlock_irqrestore(&desc->lock, flags);
continue;
+ }
switch ( entry->msi_attrib.type )
{
@@ -1041,6 +1082,11 @@ static void dump_msi(unsigned char key)
data = entry->msg.data;
addr = entry->msg.address_lo;
+ dest32 = entry->msg.dest32;
+ attr = entry->msi_attrib;
+ mask = msi_get_mask_bit(entry);
+
+ spin_unlock_irqrestore(&desc->lock, flags);
printk(" MSI%c %4u vec=%02x%7s%6s%3sassert%5s%7s"
" dest=%08x mask=%d/%d/%d...
2014 Jul 26
0
[RFC PATCH 10/11] PCI/MSI: Split the generic MSI code into new file
...msi_desc *entry = irq_get_msi_desc(irq);
+
+ __read_msi_msg(entry, msg);
+}
+
+void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
+{
+ /* Assert that the cache is valid, assuming that
+ * valid messages are not all-zeroes. */
+ BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
+ entry->msg.data));
+
+ *msg = entry->msg;
+}
+
+void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
+{
+ struct msi_desc *entry = irq_get_msi_desc(irq);
+
+ __get_cached_msi_msg(entry, msg);
+}
+
+void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
+{
+ struct m...
2014 Aug 20
1
[RFC PATCH 10/11] PCI/MSI: Split the generic MSI code into new file
...; +
> + __read_msi_msg(entry, msg);
> +}
> +
> +void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> +{
> + /* Assert that the cache is valid, assuming that
> + * valid messages are not all-zeroes. */
> + BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
> + entry->msg.data));
> +
> + *msg = entry->msg;
> +}
> +
> +void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
> +{
> + struct msi_desc *entry = irq_get_msi_desc(irq);
> +
> + __get_cached_msi_msg(entry, msg);
> +}
> +
> +void __write_m...
2014 Aug 20
1
[RFC PATCH 10/11] PCI/MSI: Split the generic MSI code into new file
...; +
> + __read_msi_msg(entry, msg);
> +}
> +
> +void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> +{
> + /* Assert that the cache is valid, assuming that
> + * valid messages are not all-zeroes. */
> + BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
> + entry->msg.data));
> +
> + *msg = entry->msg;
> +}
> +
> +void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
> +{
> + struct msi_desc *entry = irq_get_msi_desc(irq);
> +
> + __get_cached_msi_msg(entry, msg);
> +}
> +
> +void __write_m...
2014 Jul 04
4
How to check for proper MSI support?
...h the hardware now */
>>> } else if (entry->msi_attrib.is_msix) {
>>> void __iomem *base;
>>> base = entry->mask_base +
>>> entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
>>>
>>> writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
>>> writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
>>> writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
>>> ......
>>>
>>>> shouldn't. I don't know all the details about M...
2015 Nov 18
2
[RFC] kvmtool: add support for modern virtio-pci
...;msix_table;
+ offset = vpci->msix_io_block;
+ }
+
+ if (is_write)
+ memcpy(table + addr - offset, data, len);
+ else
+ memcpy(data, table + addr - offset, len);
+}
+
+static void virtio_pcim__signal_msi(struct kvm *kvm, struct virtio_pci_modern *vpci, int vec)
+{
+ struct kvm_msi msi = {
+ .address_lo = vpci->msix_table[vec].msg.address_lo,
+ .address_hi = vpci->msix_table[vec].msg.address_hi,
+ .data = vpci->msix_table[vec].msg.data,
+ };
+
+ ioctl(kvm->vm_fd, KVM_SIGNAL_MSI, &msi);
+}
+
+int virtio_pcim__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq)
+{
+ stru...
2015 Nov 18
2
[RFC] kvmtool: add support for modern virtio-pci
...;msix_table;
+ offset = vpci->msix_io_block;
+ }
+
+ if (is_write)
+ memcpy(table + addr - offset, data, len);
+ else
+ memcpy(data, table + addr - offset, len);
+}
+
+static void virtio_pcim__signal_msi(struct kvm *kvm, struct virtio_pci_modern *vpci, int vec)
+{
+ struct kvm_msi msi = {
+ .address_lo = vpci->msix_table[vec].msg.address_lo,
+ .address_hi = vpci->msix_table[vec].msg.address_hi,
+ .data = vpci->msix_table[vec].msg.data,
+ };
+
+ ioctl(kvm->vm_fd, KVM_SIGNAL_MSI, &msi);
+}
+
+int virtio_pcim__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq)
+{
+ stru...
2014 Jul 04
2
How to check for proper MSI support?
On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang <wangyijing at huawei.com> wrote:
> Hi Brian,
> From your 01:00.0 VGA compatible controller PCI config register, it supports 1 MSI vector, so I think this
> card has no problem. But you didn't answer what's the pci_enable_msi() return during it enable MSI fail.
>
> You can check PCI bus whether support MSI like:
>
>
2009 May 11
0
[PATCH 1/2] qemu-kvm: add MSI-X support
...(vector >= dev->msix_irq_entries_nr || dev->msix_entry_used[vector]++)
+ return 0;
+
+ r = kvm_get_irq_route_gsi(kvm_context);
+ if (r < 0)
+ return r;
+
+ entry->gsi = r;
+ entry->type = KVM_IRQ_ROUTING_MSI;
+ entry->flags = 0;
+ entry->u.msi.address_lo = pci_get_long(table_entry + MSIX_MSG_ADDR);
+ entry->u.msi.address_hi = pci_get_long(table_entry + MSIX_MSG_UPPER_ADDR);
+ entry->u.msi.data = pci_get_long(table_entry + MSIX_MSG_DATA);
+ r = kvm_add_routing_entry(kvm_context, entry);
+ if (r < 0) {
+ perror("msix_...
2009 May 11
0
[PATCH 1/2] qemu-kvm: add MSI-X support
...(vector >= dev->msix_irq_entries_nr || dev->msix_entry_used[vector]++)
+ return 0;
+
+ r = kvm_get_irq_route_gsi(kvm_context);
+ if (r < 0)
+ return r;
+
+ entry->gsi = r;
+ entry->type = KVM_IRQ_ROUTING_MSI;
+ entry->flags = 0;
+ entry->u.msi.address_lo = pci_get_long(table_entry + MSIX_MSG_ADDR);
+ entry->u.msi.address_hi = pci_get_long(table_entry + MSIX_MSG_UPPER_ADDR);
+ entry->u.msi.data = pci_get_long(table_entry + MSIX_MSG_DATA);
+ r = kvm_add_routing_entry(kvm_context, entry);
+ if (r < 0) {
+ perror("msix_...
2014 Jul 04
0
How to check for proper MSI support?
...if (entry->dev->current_state != PCI_D0) {
/* Don't touch the hardware now */
} else if (entry->msi_attrib.is_msix) {
void __iomem *base;
base = entry->mask_base +
entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
......
> shouldn't. I don't know all the details about MSI, but doesn't the CPU
> or (L)APIC have to support it?...
2009 May 20
0
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
...(vector >= dev->msix_irq_entries_nr || dev->msix_entry_used[vector]++)
+ return 0;
+
+ r = kvm_get_irq_route_gsi(kvm_context);
+ if (r < 0)
+ return r;
+
+ entry->gsi = r;
+ entry->type = KVM_IRQ_ROUTING_MSI;
+ entry->flags = 0;
+ entry->u.msi.address_lo = pci_get_long(table_entry + MSIX_MSG_ADDR);
+ entry->u.msi.address_hi = pci_get_long(table_entry + MSIX_MSG_UPPER_ADDR);
+ entry->u.msi.data = pci_get_long(table_entry + MSIX_MSG_DATA);
+ r = kvm_add_routing_entry(kvm_context, entry);
+ if (r < 0) {
+ perror("msix_...