Displaying 15 results from an estimated 15 matches for "addr32".
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2015 Feb 23
2
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
On Fri, 2015-02-20 at 13:47 -0500, Rafael Espíndola wrote:
> > Your task, should you choose to accept it, is to make it cope with other
> > forms of relaxation where necessary.
>
> And if not, please open a bug :-)
http://llvm.org/bugs/show_bug.cgi?id=22662
FWIW I could reproduce the 'movl foo, %ebx' one but a relative jump
*was* using 16 bits (although gas uses 8):
2015 Sep 29
3
Duplicating node in SelectionDAG?
...t it's impossible to duplicate a node in the dag. For
example, there is some code:
b = a * a; // a is a global int
A LD node is generated for A and it goes into both Operand 0 and 1 of the
MUL node. The issue is I'm trying to match a pattern of:
set dstReg:$dstD (OpNode (srcAType (load addr32:$srcA)), (srcBType (load
addr32:$srcB)))
so basically a mem, mem, reg operation.
The issue is this pattern won't match in the above example because there is
only one LD generated for 'a'. I tried to duplicate the LD in the dag but
it doesn't show up, it always reduces it to only o...
2014 Jan 14
2
[LLVMdev] 16-bit x86 status update
...support 16-bit mode
(which was previously present, but could not be invoked and was fairly
broken). And added a '-m16' option to clang.
The main caveats to bear in mind for 16-bit code which was previously
built with gcc/gas are:
• We do not support the explicit 'data32' and 'addr32' prefixes in asm.
The data32 prefix is almost never needed. If you use the correct
suffix on an instruction (retl vs. retw, for example), then you
should never need to use 'data32'.
The addr32 prefix *is* needed by GNU binutils, because *even* when
given an explicit add...
2015 Feb 20
3
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
...und out that it generates a 16-bit code bigger than gas counterpart
and result gets too big for size constraints of bootsector. This was
traced mainly to 2 problems.
32-bit access to 16-bit addresses.
source:
movl LOCAL(kernel_sector), %ebx
movl %ebx, 8(%si)
clang:
7cbc: 67 66 8b 1d 5c 7c 00 addr32 mov 0x7c5c,%ebx
7cc3: 00
7cc4: 66 89 5c 08 mov %ebx,0x8(%si)
gas:
7cbc: 66 8b 1e 5c 7c mov 0x7c5c,%ebx
7cc1: 66 89 5c 08 mov %ebx,0x8(%si)
32-bit jump.
source:
jnb LOCAL(floppy_probe)
clang:
+ 7cb5: 66 0f 83 07 01 00 00 jae 7dc3 <L_flo...
2015 Feb 20
2
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
...that it generates a 16-bit code bigger than gas counterpart
>> and result gets too big for size constraints of bootsector. This was
>> traced mainly to 2 problems.
>
> ...
>
>> 32-bit access to 16-bit addresses.
>> clang:
>> 7cbc: 67 66 8b 1d 5c 7c 00 00 addr32 mov 0x7c5c,%ebx
>> gas:
>> 7cbc: 66 8b 1e 5c 7c mov 0x7c5c,%ebx
>
>> 32-bit jump.
>> clang:
>> + 7cb5: 66 0f 83 07 01 00 00 jae 7dc3 <L_floppy_probe>
>> gas:
>> - 7cb5: 0f 83 0a 01 jae 7dc3 <L_floppy_probe&g...
2014 Jan 14
4
[LLVMdev] 16-bit x86 status update
...uld not be invoked and was fairly
> > broken). And added a '-m16' option to clang.
> >
> > The main caveats to bear in mind for 16-bit code which was previously
> > built with gcc/gas are:
> >
> > • We do not support the explicit 'data32' and 'addr32' prefixes in asm.
> >
> > The data32 prefix is almost never needed. If you use the correct
> > suffix on an instruction (retl vs. retw, for example), then you
> > should never need to use 'data32'.
> >
> > The addr32 prefix *is* needed by GNU...
2020 Nov 08
1
Obj doesn't link under MSVC
...I could not find a solution yet.
I'm using LLVM in combination with the Microsoft's compiler and the
platform I'm
targeting is also MSVC x64.
When linking a generated .obj file with code from another cpp into the
dll, the
linker complains as follows:
```
s.obj : error LNK2017: 'ADDR32' relocation to '.rdata' invalid without
/LARGEADDRESSAWARE:NO
LINK : fatal error LNK1165: link failed because of fixup errors
```
which is funny because as far as I can tell, that flag should have no
effect on
x64 anyway. If I add it to the linker command, it says it's ignored.
I&...
2019 Jul 28
2
[RFC] Changing X86 data layout for address spaces
That is basically what we do today to provide mixed sized pointers with
our legacy frontends. They generate IR to our old code generator which
has ADDR32 and ADDR64 datatypes. We use a 64-bit address data layout
and then typecast the 32-bit forms to/from the underlying 64-bit
addresses. I have been warned that such rampant typecasting might
interfere with certain optimizations or TBAA data. We haven't
investigated that yet. Since clang doesn...
2019 Jul 31
3
[RFC] Changing X86 data layout for address spaces
...gan
> <john.reagan at vmssoftware.com <mailto:john.reagan at vmssoftware.com>> wrote:
>
> That is basically what we do today to provide mixed sized pointers
> with
> our legacy frontends. They generate IR to our old code generator
> which
> has ADDR32 and ADDR64 datatypes. We use a 64-bit address data layout
> and then typecast the 32-bit forms to/from the underlying 64-bit
> addresses. I have been warned that such rampant typecasting might
> interfere with certain optimizations or TBAA data. We haven't
> inves...
2016 Jul 06
2
Status of stack walking in LLVM on Win64?
Can we accept the patch which makes this work? There is a patch in the
bug report for the MCJIT case. I'm confused why AOT and MCJIT case
would be different but without it the information isn't registered.
On Wed, Jul 6, 2016 at 9:07 AM, Reid Kleckner via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> If you want an AOT linker and you don't want to use link.exe, you can use
2015 Feb 20
2
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
...oing that. It's the *same*
opcode, but you'll have to set a flag to tell the emitter to use the
32-bit addressing mode (for data and/or addr as appropriate) this time.
And while you're doing that, you should note that that's the *same* flag
that'll be needed to support explicit addr32/data32 prefixes in the asm
source. So you might as well support those too. I might suggest doing
them *first*, in fact.
--
David Woodhouse Open Source Technology Centre
David.Woodhouse at intel.com Intel Corporation
-------------- next part...
2019 Jul 23
2
[RFC] Changing X86 data layout for address spaces
Please don't bake in knowledge *in LLVM* of a address space unless
there's a strong need. *Clang* can assign whatever meaning to an AS it
wishes, and their properties are configurable via data layout
configuration.
The standards of review are much lower for a Clang only change as it can
be revised arbitrarily without breaking other uses of LLVM. Building in
first class knowledge to
2007 Jul 30
50
boot a existing windows in hvm domain
Hi all
don''t get such envionment to try now. so ask for help here.
imagine that two os installed.
Xen3.1 + Linux is installed in /dev/hda
and windows xp is installed in /dev/hdb
I don''t want to reboot to use windows. Is it possiable to boot the hdb
windows in xen?
i saw there are some threads about P2V in this mail list. will the P2V
tools help?
thanks
2007 Jul 30
50
boot a existing windows in hvm domain
Hi all
don''t get such envionment to try now. so ask for help here.
imagine that two os installed.
Xen3.1 + Linux is installed in /dev/hda
and windows xp is installed in /dev/hdb
I don''t want to reboot to use windows. Is it possiable to boot the hdb
windows in xen?
i saw there are some threads about P2V in this mail list. will the P2V
tools help?
thanks
2019 Jul 31
3
[RFC] Changing X86 data layout for address spaces
...n at vmssoftware.com <mailto:john.reagan at vmssoftware.com>> wrote:
>>
>> That is basically what we do today to provide mixed sized
>> pointers with
>> our legacy frontends. They generate IR to our old code generator
>> which
>> has ADDR32 and ADDR64 datatypes. We use a 64-bit address data layout
>> and then typecast the 32-bit forms to/from the underlying 64-bit
>> addresses. I have been warned that such rampant typecasting might
>> interfere with certain optimizations or TBAA data. We haven't
&g...