search for: add8rr

Displaying 5 results from an estimated 5 matches for "add8rr".

2012 Jan 10
1
[LLVMdev] SelectionDAG
...pe foo, at function foo: # @foo # BB#0: # %entry SUB r24, 5 RET .tmp0: .size foo, .tmp0-foo With that my question is how to get LLVM to select SUB instead of the pattern above. I have tried to place SUB8ri (see below) before the ADD8rr instruction in the .td file, but that does not seem to make a difference. *things to note, the AVR instruction set does not contain a ADD8ri, so I would eventually like to convert all add register and immediate to subtract register and -immediate, but for now if I could just get LLVM to use SUB8ri...
2010 Jul 26
1
[LLVMdev] How to specify patterns for instructions with accumulator in selection DAG?
Hi, I am wondering how to specify the selection DAG patterns for instructions that use accumulator. For example multiply-accumulate instruction with one destination operand and two source operands: mac $dst, $src1, $src2 ;; $dst += $src1*$src2 Seems that it has a cycle in the pattern. So how do I specify it in the DAG? There are a few instructions in the ARM backend like this one, but the
2015 Jan 01
2
[LLVMdev] What is dead def?
I saw there is reference to dead def on registers in LLVM source code. I am not aware of this concept from the traditional course material. What are the properties of dead def? Cheers Thomson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150101/ea39d1e4/attachment.html>
2014 Jun 11
2
[LLVMdev] Help regarding ad new functionality in Backend
Dear, I am looking at the Instructions defined in the XXXXInstrInfo.td where I can see a def record defined like below def ADD8rr : I8rr<0x0, (outs GR8:$dst), (ins GR8:$src, GR8:$src2), "add.b\t{$src2, $dst}", [(set GR8:$dst, (*add *GR8:$src, GR8:$src2)), (implicit SRW)]>; Now here I would like the to replace the add(highlighted) by...
2016 Feb 12
3
Experimental 6502 backend; memory operand folding problem
Greetings, LLVM devs, For the past few weeks, I have been putting together a 6502 backend for LLVM. The 6502 and its derivatives, of course, have powered countless microcomputers, game consoles and arcade machines over the past 40 years. The backend is just an experimental hobby project right now. The code is available here: <https://github.com/beholdnec/llvm-m6502>. This branch introduces