Displaying 2 results from an estimated 2 matches for "add8ri".
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add8rr
2013 Jan 18
0
[LLVMdev] llvm backend porting question ,
...MachineMemOperand::MOStore,
MFI.getObjectSize(MVT::i8),
Align);
BuildMI(MBB, MI, DL, get(Picoblaze::STORETOSTACK ));//.addMemOperand(MMO);
if (RC == &Picoblaze::GR8RegClass)
{
// BuildMI(MBB, MI, DL, get(Picoblaze::ADD8ri ))
// .addReg(Picoblaze::BP)
// .addImm(FrameIdx);
BuildMI(MBB, MI, DL, get(Picoblaze::STORE_I))
.addImm(FrameIdx)
.addReg(SrcReg,getKillRegState(isKill))
;
// .addMemOperand(MMO); ;//addReg(Picoblaze::BP);
// BuildMI(MBB, MI, DL, get(Picoblaze::ADD8ri ))
// ....
2012 Jan 10
1
[LLVMdev] SelectionDAG
....size foo, .tmp0-foo
With that my question is how to get LLVM to select SUB instead of the pattern above. I have tried to place SUB8ri (see below) before the ADD8rr instruction in the .td file, but that does not seem to make a difference. *things to note, the AVR instruction set does not contain a ADD8ri, so I would eventually like to convert all add register and immediate to subtract register and -immediate, but for now if I could just get LLVM to use SUB8ri in the most straightforward case that would work for me. Thanks,
Joshua
// SUB8ri definition
let Constraints = "$src = $dst" in
d...