search for: aarch64schedule

Hi list, Is it possible to simulate load to store forwarding on aarch64 with MI scheduling model on AArch64? For instance $x0 data latency in the example below should be 1 cycle ldr $x0, [$x1] str $x0, [$x2] But it should be 4 cycles if we have another instruction: ldr $x0, [$x1] add $x0, $x0, 4 For ALU instructions it’s possible to use either ReadAdvance or SchedReadAdvance, but I don’t see

...ike this: def ReadAdr : SchedReadAdvance<3, [WriteLD]> Briefly glancing at the AArch64 target I see this for stores: Sched<[WriteST]>; So it doesn't look like there's any existing name for the store’s address operand. You could add a general ReadAdr SchedRead resource in AArch64Schedule.td. Then you would need to change the ReadAdr line in your subtarget to an override: def : ReadAdvance<ReadAdr, 3, [WriteLD]> Or instead you can just add a rule in your subtarget listing the opcodes or using a regex, and using the ReadAdr resource that you defined in the same file. def...