search for: _f

Displaying 20 results from an estimated 111 matches for "_f".

2006 Aug 09
7
function before_save
Hi everybody I would like a function as the "before_save" method in the model. But it must be the opposite. When I take out data from the database through the model, I want to call a function before the data are available in the controller. Can anyone help me? ---- >>>> thx <<<< ---- -- Posted via http://www.ruby-forum.com/.
2012 Jan 04
1
[LLVMdev] How can I compile a c source file to use SSE2 Data Movement Instructions?
..." -O3 -ferror-limit 19 -fmessage-length 80 -mstackrealign -fms-extension -fms-compatibility -fmsc-version=1300 -fdelayed-template-parsing -fgnu-runtime -fobjc-runtime-has-arc -fobjc-runtime-has-weak -fobjc-fragile-abi -fdiagnostics show-option -fcolor-diagnostics -o test.s -x c test.c .def _f; .scl 2; .type 32; .endef .text .globl _f .align 16, 0x90 _f: # @f # BB#0: movl $-800, %eax # imm = 0xFFFFFFFFFFFFFCE0 movsd _DA, %xmm0 .align 16, 0x90 LBB0_1: # =>This Inner Loop Header: Depth=1 movsd _X+8...
2012 Jul 03
3
[LLVMdev] bug in tablegen?
...I should be able to pass parameters: >> I.OutOperandList, I.InOperandList >> >> But instead, I must back substitute what I know the values of these are. >> (outs CPU16Regs:$rx), (ins CPU16Regs:$ry, CPU16Regs:$rz) >> >> >> class FRRR16_ins<bits<2> _f, string asmstr, list<dag> pattern, >> InstrItinClass itin> : >> FRRR16<_f, (outs CPU16Regs:$rz), (ins CPU16Regs:$rx, >> CPU16Regs:$ry), >> !strconcat(asmstr, "\t$rz, $rx, $ry"), >> pattern, itin...
2012 Jul 04
0
[LLVMdev] bug in tablegen?
class FRRR16_ins<bits<2> _f, string asmstr, list<dag> pattern, InstrItinClass itin> : // ... This class has template args. You don't specify them in the first template arg of class ArithLogicR16<FRRR16_ins I, SDNode OpNode, bit isComm = 0>: // ... --Sean Silva On Tue, Jul 3, 2012 at 2:29 PM, reed kotler...
2012 Jul 03
2
[LLVMdev] bug in tablegen?
...ps16 (not yet checked into main source). The problem is that I should be able to pass parameters: I.OutOperandList, I.InOperandList But instead, I must back substitute what I know the values of these are. (outs CPU16Regs:$rx), (ins CPU16Regs:$ry, CPU16Regs:$rz) class FRRR16_ins<bits<2> _f, string asmstr, list<dag> pattern, InstrItinClass itin> : FRRR16<_f, (outs CPU16Regs:$rz), (ins CPU16Regs:$rx, CPU16Regs:$ry), !strconcat(asmstr, "\t$rz, $rx, $ry"), pattern, itin>; class ArithLogicR16<FRRR16_ins I, SDNo...
2012 Mar 27
1
[LLVMdev] Compiling integer mod
...ifts, 1 add, and 1 substract than to do 1 mov, 1 cdq, and 1 idiv? I run into this while trying to understand why my code runs slower with llvm than a comparable program on windows. Thanks for any help, Brent int f(int n) { return (n + 1) % 18; } "clang -O2 -S" produces this code: _f: # @f # BB#0: movl 4(%esp), %ecx incl %ecx movl $954437177, %edx # imm = 0x38E38E39 movl %ecx, %eax imull %edx movl %edx, %eax shrl $31, %eax sarl $2, %edx addl %eax, %edx imull $18, %edx, %eax subl %eax, %ecx movl %ecx, %eax ret The visual...
2012 Jul 05
2
[LLVMdev] bug in tablegen?
...LogicRTest16<"AdduRxRyRz16", add, 1>; I think that the problem has to do with the operaand lists not working if there is substitution required. Tablegen is only complaining about $rx, $ry and $rz . On 07/03/2012 05:35 PM, Sean Silva wrote: > class FRRR16_ins<bits<2> _f, string asmstr, list<dag> pattern, > InstrItinClass itin> : // ... > > This class has template args. You don't specify them in the first > template arg of > class ArithLogicR16<FRRR16_ins I, SDNode OpNode, bit isComm = 0>: // ... > > --Sean Silva > >...
2012 Jul 05
0
[LLVMdev] bug in tablegen?
...add, 1>; > > I think that the problem has to do with the operaand lists not working > if there is substitution > required. > > Tablegen is only complaining about $rx, $ry and $rz . > > On 07/03/2012 05:35 PM, Sean Silva wrote: >> class FRRR16_ins<bits<2> _f, string asmstr, list<dag> pattern, >> InstrItinClass itin> : // ... >> >> This class has template args. You don't specify them in the first >> template arg of >> class ArithLogicR16<FRRR16_ins I, SDNode OpNode, bit isComm = 0>: // ... >> &g...
2012 Jul 03
0
[LLVMdev] bug in tablegen?
...> > The problem is that I should be able to pass parameters: > I.OutOperandList, I.InOperandList > > But instead, I must back substitute what I know the values of these are. > (outs CPU16Regs:$rx), (ins CPU16Regs:$ry, CPU16Regs:$rz) > > > class FRRR16_ins<bits<2> _f, string asmstr, list<dag> pattern, > InstrItinClass itin> : > FRRR16<_f, (outs CPU16Regs:$rz), (ins CPU16Regs:$rx, > CPU16Regs:$ry), > !strconcat(asmstr, "\t$rz, $rx, $ry"), > pattern, itin>; > > class Ari...
2008 Jul 15
5
[PATCH] ioemu-remote: Fix pci pass-through
ioemu-remote: Enable pci pass-through by default. -- Jean Guyader _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2008 Apr 21
3
[LLVMdev] Implementing try/catch/finally
Duncan Sands wrote: >> One approach would be to simply duplicate the code in the 'finally' >> block for each exit, but that seems sub-optimal. It would be better, I >> think, to set a state variable before entering the 'finally' block, and >> then have it do a switch instruction at the end and transfer to the >> appropriate block. >>
2013 Dec 12
0
[LLVMdev] AVX code gen
...k the right processor architecture. You could try “clang -mavx” or “clang -march=corei7-avx” for ivy-bridge and “clang -march=core-avx2” or “clang -mavx2" for haswell. $ clang -march=core-avx2 -O3 -S -o - test.c .section __TEXT,__text,regular,pure_instructions .globl _f .align 4, 0x90 _f: ## @f .cfi_startproc ## BB#0: ## %entry pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_regis...
2006 Aug 11
2
[PATCH][XEN] Use a union to pack the dual-short combos in an endian neutral way.
...; +/* The first to members of a grant entry are updated as a combined + * pair. The following union allows that to happen in an endian + * neutral fashion. */ +union grant_combo { + uint32_t word; + struct { + uint16_t flags; + domid_t domid; + } shorts; +}; + #define PIN_FAIL(_lbl, _rc, _f, _a...) \ do { \ DPRINTK( _f, ## _a ); \ @@ -177,7 +188,7 @@ __gnttab_map_grant_ref( */ for ( ; ; ) { - u32 scombo, prev_scombo, new_scombo; + union gra...
2013 Dec 11
2
[LLVMdev] AVX code gen
Hello - I found this post on the llvm blog: http://blog.llvm.org/2012/12/new-loop-vectorizer.html which makes me think that clang / llvm are capable of generating AVX with packed instructions as well as utilizing the full width of the YMM registers… I have an environment where icc generates these instructions (vmulps %ymm1, %ymm3, %ymm2 for example) but I can not get clang/llvm to generate such
2015 Jun 26
2
Asterisk dialplan best practices syntax
Hi, I've two yocto questions about the syntax of dialplan: 1. What's the "official" notation of each line: "=>" or "=" ? In the wiki of Asterisk, I see very often "=>", however, what's the reason for both syntaxes authorized ? Historical ? 2. To write info in logs/console, you have two commands: NoOp and Verbose. Verbose seems to be
2013 Jan 06
1
[PATCH] menugen: Make it compatible with Py3k
...n "Error: Unknown keyword %s" % name if name == "skipcondn": try: # is skipcondn a number? @@ -146,7 +146,7 @@ class Menusystem: except: # it is a "-" delimited sequence value = value.lower() parts = [ self.shift_flags.get(x.strip(),None) for x in value.split("-") ] - self.system["skipcondn"] = " | ".join(filter(None, parts)) + self.system["skipcondn"] = " | ".join([_f for _f in parts if _f]) else: self.system[name] =...
2011 Feb 09
0
[LLVMdev] Why do we mangle names in llvm?
When we produce IL for int f(void) {...} it looks like define i32 @f() {.... and llvm is then responsible for adding the '_' prefix: _f: .... Why do we have this division? Wouldn't it be better for the IL to have the '_': define i32 @_f() {.... This causes problems with LTO because the symbols seem by the first pass are not the same as the ones seen once the final .o is produced. It can be fixed by having libLTO c...
2015 Jun 01
0
[LLVMdev] Hash Table Virtual Calls with Conflict Resolution Stubs
...ons) or modifying inreg to allow > specifying a particular register (albeit encoding target-specific > information like this isn't ideal). Assuming you have full control over your environment, I'd not start by writing a new calling convention. I'd just have: ... %dest = load_from_itable() call i32 %dest(i32 METHOD_ID, rest of the arguments ...) ... and have the conflict resolution stub be: define i32 @conflict_redo(i32 %method_id, arg0, arg1, arg2) { dispatch based on %method_id } with the normal x86 calling conventions. Later, as an *optimization* I'...
2003 Sep 22
2
Weird error when using VI on FreeBSD-4.x
...le Basically, VI just exits/crashes (no core dump). The load average is pretty low: 4:18PM up 10 days, 23:42, 4 users, load averages: 0.13, 0.21, 0.21 And I don't seem to have any other problems with the system. Wondering what this might be, or if it's a known problem, etc. Thanks. _F
2001 Mar 29
2
libvorbis: NO_FLOAT_MATH_LIB patch
This is in response to NO_FLOAT_MATH_LIB not getting set on Solaris. The patchlet below - makes configure check for sqrtf(), - defines HAVE_SQRTF if sqrtf() has been found, - uses HAVE_SQRTF in lib/os.h. NO_FLOAT_MATH_LIB isn't used any longer. --- configure.in.orig Fri Mar 30 02:02:35 2001 +++ configure.in Fri Mar 30...