search for: _efer_lma

Displaying 5 results from an estimated 5 matches for "_efer_lma".

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[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
...=================================================================== --- 2007-08-08.orig/xen/include/asm-x86/msr.h 2007-08-07 15:00:27.000000000 +0200 +++ 2007-08-08/xen/include/asm-x86/msr.h 2007-08-08 11:43:53.000000000 +0200 @@ -140,12 +140,16 @@ static inline void wrmsrl(unsigned int m #define _EFER_LMA 10 /* Long mode active (read-only) */ #define _EFER_NX 11 /* No execute enable */ #define _EFER_SVME 12 +#define _EFER_LMSLE 13 +#define _EFER_FFXSE 14 #define EFER_SCE (1<<_EFER_SCE) #define EFER_LME (1<<_EFER_LME) #define EFER_LMA (1<<_EFER_LMA) #define EFER_NX (1<&l...
No subject
2007 Apr 18
1
No subject
...efine MSR_FS_BASE 0xc0000100 /* 64bit FS base */ +#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ +#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ + +/* EFER bits: */ +#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */ +#define _EFER_LME 0x00000008 /* Long mode enable */ +#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */ +#define _EFER_NX 0x0000000b /* No execute enable */ + +#define EFER_SCE (1<<_EFER_SCE) +#define EFER_LME (1<<_EFER_LME) +#define EFER_LMA (1<<_EFER_LMA) +#define EFER_NX (1<<_EFER_NX) + +/* Intel MSRs. Some also available...
No subject
2007 Apr 18
1
No subject
...efine MSR_FS_BASE 0xc0000100 /* 64bit FS base */ +#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ +#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ + +/* EFER bits: */ +#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */ +#define _EFER_LME 0x00000008 /* Long mode enable */ +#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */ +#define _EFER_NX 0x0000000b /* No execute enable */ + +#define EFER_SCE (1<<_EFER_SCE) +#define EFER_LME (1<<_EFER_LME) +#define EFER_LMA (1<<_EFER_LMA) +#define EFER_NX (1<<_EFER_NX) + +/* Intel MSRs. Some also available...
[PATCH] Clean up x86 control register and MSR macros (corrected)
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...efine MSR_FS_BASE 0xc0000100 /* 64bit FS base */ +#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ +#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ + +/* EFER bits: */ +#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */ +#define _EFER_LME 0x00000008 /* Long mode enable */ +#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */ +#define _EFER_NX 0x0000000b /* No execute enable */ + +#define EFER_SCE (1<<_EFER_SCE) +#define EFER_LME (1<<_EFER_LME) +#define EFER_LMA (1<<_EFER_LMA) +#define EFER_NX (1<<_EFER_NX) + +/* Intel MSRs. Some also available...
[PATCH] Clean up x86 control register and MSR macros (corrected)
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...efine MSR_FS_BASE 0xc0000100 /* 64bit FS base */ +#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ +#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ + +/* EFER bits: */ +#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */ +#define _EFER_LME 0x00000008 /* Long mode enable */ +#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */ +#define _EFER_NX 0x0000000b /* No execute enable */ + +#define EFER_SCE (1<<_EFER_SCE) +#define EFER_LME (1<<_EFER_LME) +#define EFER_LMA (1<<_EFER_LMA) +#define EFER_NX (1<<_EFER_NX) + +/* Intel MSRs. Some also available...