Displaying 6 results from an estimated 6 matches for "_efer_lme".
2007 Apr 18
1
No subject
...CALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
+#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
+#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
+#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
+
+/* EFER bits: */
+#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */
+#define _EFER_LME 0x00000008 /* Long mode enable */
+#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */
+#define _EFER_NX 0x0000000b /* No execute enable */
+
+#define EFER_SCE (1<<_EFER_SCE)
+#define EFER_LME (1<<_EFER_LME)
+#define EFER_LMA (1<<_EFER_LMA)
+#define EFER_NX (1&...
2007 Apr 18
1
No subject
...CALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
+#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
+#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
+#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
+
+/* EFER bits: */
+#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */
+#define _EFER_LME 0x00000008 /* Long mode enable */
+#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */
+#define _EFER_NX 0x0000000b /* No execute enable */
+
+#define EFER_SCE (1<<_EFER_SCE)
+#define EFER_LME (1<<_EFER_LME)
+#define EFER_LMA (1<<_EFER_LMA)
+#define EFER_NX (1&...
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...CALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
+#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
+#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
+#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
+
+/* EFER bits: */
+#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */
+#define _EFER_LME 0x00000008 /* Long mode enable */
+#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */
+#define _EFER_NX 0x0000000b /* No execute enable */
+
+#define EFER_SCE (1<<_EFER_SCE)
+#define EFER_LME (1<<_EFER_LME)
+#define EFER_LMA (1<<_EFER_LMA)
+#define EFER_NX (1&...
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...CALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
+#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
+#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
+#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
+
+/* EFER bits: */
+#define _EFER_SCE 0x00000000 /* SYSCALL/SYSRET */
+#define _EFER_LME 0x00000008 /* Long mode enable */
+#define _EFER_LMA 0x0000000a /* Long mode active (read-only) */
+#define _EFER_NX 0x0000000b /* No execute enable */
+
+#define EFER_SCE (1<<_EFER_SCE)
+#define EFER_LME (1<<_EFER_LME)
+#define EFER_LMA (1<<_EFER_LMA)
+#define EFER_NX (1&...
2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
...0,12 +140,16 @@ static inline void wrmsrl(unsigned int m
#define _EFER_LMA 10 /* Long mode active (read-only) */
#define _EFER_NX 11 /* No execute enable */
#define _EFER_SVME 12
+#define _EFER_LMSLE 13
+#define _EFER_FFXSE 14
#define EFER_SCE (1<<_EFER_SCE)
#define EFER_LME (1<<_EFER_LME)
#define EFER_LMA (1<<_EFER_LMA)
#define EFER_NX (1<<_EFER_NX)
#define EFER_SVME (1<<_EFER_SVME)
+#define EFER_LMSLE (1<<_EFER_LMSLE)
+#define EFER_FFXSE (1<<_EFER_FFXSE)
#ifndef __ASSEMBLY__
@@ -329,8 +333,6 @@ static inline void write_efer(__u64 val)
#define...
2007 Jun 27
0
[PATCH 1/10] Provide basic Xen PM infrastructure
...(Extended Feature Enable Register). */
+ mov bootsym_phys(cpuid_ext_features),%edi
+ test $0x20100800,%edi /* SYSCALL/SYSRET, No Execute, Long
Mode? */
+ jz .Lskip_eferw
+ movl $MSR_EFER,%ecx
+ rdmsr
+#if CONFIG_PAGING_LEVELS == 4
+ btsl $_EFER_LME,%eax /* Long Mode */
+ btsl $_EFER_SCE,%eax /* SYSCALL/SYSRET */
+#endif
+ btl $20,%edi /* No Execute? */
+ jnc 1f
+ btsl $_EFER_NX,%eax /* No Execute */
+1: wrmsr
+.Lskip_eferw:
+#endif
+
+ wbinvd
+
+ mov $0x80050...