Displaying 7 results from an estimated 7 matches for "_atlas".
Did you mean:
atlas
2014 Mar 19
2
[LLVMdev] Type inference on registers with can contain multiple types
...e best thing to do here? Explicitly annotating the input type
works, of course, but then I need two rules. Use a multipattern? Or is
there a way to tell tablegen that the input is allowed to be either?
--
┌─── dg@cowlark.com ───── http://www.cowlark.com ─────
│
│ "You cannot truly appreciate _Atlas Shrugged_ until you have read it
│ in the original Klingon." --- Sea Wasp on r.a.sf.w
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 876 bytes
Desc: OpenPGP digital signature
URL: <http://lists.llvm.or...
2014 May 28
2
[LLVMdev] Partially complete LLVM backend for the VideoCore 4
...terrible, hence this port.
Unfortunately I've run out of time and probably won't get a chance to
work on this for a while, so if anyone is interested, help yourself:
https://cowlark.com/llvm
--
┌─── dg@cowlark.com ───── http://www.cowlark.com ─────
│
│ "You cannot truly appreciate _Atlas Shrugged_ until you have read it
│ in the original Klingon." --- Sea Wasp on r.a.sf.w
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 876 bytes
Desc: OpenPGP digital signature
URL: <http://lists.llvm.or...
2014 Mar 09
2
[LLVMdev] Isel DAG documentation?
Hi David,
> [(set GR32:$rD, globaladdr:$addr)]
> It seems to have somehow managed to create a cycle in the DAG, which is
> of course wrong. But how?
When I write a similar pattern into the ARM .td files and look at
(from the build directory) lib/Target/ARM/ARMGenDAGISel.inc, I see:
/*56478*/ /*SwitchOpcode*/ 13, TARGET_VAL(ISD::GlobalAddress),// ->56494
/*56481*/
2014 Mar 05
2
[LLVMdev] Stub LLVM backend wanted
> Maybe this would make a good GSOC project.
It's definitely too small project for a GSoC.
One can try to start from https://github.com/asl/llvm-openrisc
(openrisc branch inside), however, it's already 2 years old...
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State Universit
2014 May 29
2
[LLVMdev] Partially complete LLVM backend for the VideoCore 4
...g.)
[...]
> http://www.raspberrypi.org/a-birthday-present-from-broadcom/).
Yes, the QPU is really interesting. Unfortunately I prefer my processors
to have... how do I put it... memory operations!
--
┌─── dg@cowlark.com ───── http://www.cowlark.com ─────
│
│ "You cannot truly appreciate _Atlas Shrugged_ until you have read it
│ in the original Klingon." --- Sea Wasp on r.a.sf.w
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 876 bytes
Desc: OpenPGP digital signature
URL: <http://lists.llvm.or...
2014 Mar 08
3
[LLVMdev] Isel DAG documentation?
...;ve found is include/llvm/Target/TargetSelectionDAG.td,
which at least lists them but doesn't say what they do, and the C++
implementations in SelectionDAGNodes.h, which is entirely undocumented...
--
┌─── dg@cowlark.com ───── http://www.cowlark.com ─────
│
│ "You cannot truly appreciate _Atlas Shrugged_ until you have read it
│ in the original Klingon." --- Sea Wasp on r.a.sf.w
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 876 bytes
Desc: OpenPGP digital signature
URL: <http://lists.llvm.or...
2014 Mar 08
2
[LLVMdev] Isel DAG documentation?
On 8 March 2014 00:53, Owen Anderson <resistor at mac.com> wrote:
> ISDOpcodes.h contains what documentation there is on the semantics of each
> opcode.
And TargetOpcodes.h for a few of the post-ISel ones (mostly they're in
MachineInstr form, but you'll see them with -view-sched-dags, and
occasionally before).
Tim.