Displaying 4 results from an estimated 4 matches for "_address_".
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2016 Mar 01
3
[PATCH 0/2] virtio/s390 patches
Hi Michael,
here are two virtio/s390 patches (one cleanup, one bugfix), prepared
against your vhost branch of mst/vhost.git.
Please apply.
Cornelia Huck (1):
virtio/s390: size of SET_IND payload
Geliang Tang (1):
virtio/s390: use dev_to_virtio
drivers/s390/virtio/virtio_ccw.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
--
2.3.9
2016 Mar 01
3
[PATCH 0/2] virtio/s390 patches
Hi Michael,
here are two virtio/s390 patches (one cleanup, one bugfix), prepared
against your vhost branch of mst/vhost.git.
Please apply.
Cornelia Huck (1):
virtio/s390: size of SET_IND payload
Geliang Tang (1):
virtio/s390: use dev_to_virtio
drivers/s390/virtio/virtio_ccw.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
--
2.3.9
2008 Jul 17
3
[LLVMdev] SSA or not SSA?
[ sorry for the late reply ]
Patrick Meredith <pmeredit at uiuc.edu> wrote:
> All register uses are SSA. Memory is not in SSA. The mem2reg pass
> which promotes stack variables to registers effectively converts non-
> SSA to SSA. There was a reg2mem pass, written by Andrew Lenharth, I'm
> not sure if it's still being maintained.
What is the difference between
2018 Mar 23
5
RFC: Speculative Load Hardening (a Spectre variant #1 mitigation)
...ed.
```
Because on x86 the zero-extend is free, this can efficiently harden the
loaded
value.
##### Hardening the address of the load
When hardening the loaded value is inapplicable, most often because the
instruction directly leaks information (like `cmp` or `jmpq`), we switch to
hardening the _address_ of the load instead of the loaded value. This avoids
increasing register pressure by unfolding the load or paying some other high
cost.
To understand how this works in practice, we need to examine the exact
semantics of the x86 addressing modes which, in its fully general form,
looks
like `(%base,...