search for: __noinline__

Displaying 11 results from an estimated 11 matches for "__noinline__".

2015 Jan 22
5
[LLVMdev] Why does "uwtable" prevent optimizing Invoke -> Call?
Hi, in r176827 the optimization that turns invokes with empty landing pads into plain calls was disabled for invocations of function with the "uwtable" attribute. But given this code: struct S { ~S() {}; }; void blackbox(); __attribute__((__noinline__)) void inner() { blackbox(); } int foo() { S s; inner(); return 0; } int bar() { inner(); return 0; } clang directly emits a call instruction in "bar", because there is nothing to be cleaned up. But in "foo", it emits an...
2010 Sep 13
1
[LLVMdev] isLCSSAForm failed
Hi folk, I have a Module pass. I tested the pass against the following code. ./gcc.dg/20030721-1.c extern void abort(void); void foo(int) __attribute__((__noinline__)); void foo(int i) { abort(); } int main() { int i; int first= 0; int last= 0; while (last<3) { last = first; while (first<=last) { first++; for (i=0;i<3;i++) last++; if (last>10) return 0; } foo(first); } return 0;...
2010 Sep 13
0
[LLVMdev] isLCSSAForm failed
Never mind, I've figured out the problem. On 09/12/2010 07:41 PM, Neal N. Wang wrote: Hi folk, I have a Module pass. I tested the pass against the following code. ./gcc.dg/20030721-1.c extern void abort(void); void foo(int) __attribute__((__noinline__)); void foo(int i) { abort(); } int main() { int i; int first= 0; int last= 0; while (last<3) { last = first; while (first<=last) { first++; for (i=0;i<3;i++) last++; if (last>10) return 0; } foo(first); } return 0;...
2005 May 07
0
[LLVMdev] calling conventions and inlining
...nce > of some compression routine by about 10% for gcc 2.6.3. Fortunately these > times have passed for register allocation, but not yet for inlining. You've just ignored all of the reasons I gave you above about why this is a bad idea. > Basically using things like _attribute__((__noinline__)) and > __declspec(noinline) means the same - they may be unnecessary in ten years, > but definitely not today. Just like in the past you can easily boost > performance by putting them in the right place, even if it may be necessary > to surround this by #ifdef REGISTER_STARVED_CPU...
2013 Oct 09
0
[LLVMdev] Question about anti-dependence breaker
----- Original Message ----- > > > > hi, > I have few question about breaking anti-dependence of postRAScheduler > in LLVM. > when I use command line "clang -target arm -mcpu=cortex-a8 -O2 > -integrated-as -c test.c -o test.o" > and get objdump file as follows: > ldr r1, [r0,#16]----(1 > str r1, [r0,#32]----(2 > ldr r1, [r0,#12]----(3 > str r1,
2013 Oct 09
2
[LLVMdev] Question about anti-dependence breaker
hi, I have few question about breaking anti-dependence of postRAScheduler in LLVM. when I use command line "clang -target arm -mcpu=cortex-a8 -O2 -integrated-as -c test.c -o test.o" and get objdump file as follows: ldrr1, [r0,#16]----(1 str r1, [r0,#32]----(2 ldr r1, [r0,#12]----(3 str r1, [r0,#36]----(4 ldr r1, [r0,#08]----(5 str r1, [r0,#40]----(6 However, I expect that instruction
2010 Sep 29
0
[LLVMdev] comparison pattern trouble - might be a bug in LLVM 2.8?
On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > >> Our architecture has 1-bit boolean predicate registers. >> >> I've defined comparison >> >> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>;
2010 Sep 29
1
[LLVMdev] comparison pattern trouble - might be a bug in LLVM 2.8?
On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > Our architecture has 1-bit boolean predicate registers. > > I've defined comparison > > > def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>; > > > > > But then I end up having the following bug: > >
2018 May 30
0
[SROA][DebugInfo][GSoC] Testing SROA on amalgamated sqlite source
...t necessarily a bug, but it can be (especially when observed as a regression between compiler revisions). Using the standard Fibonacci example with clang and lldb from this afternoon: 1 #ifdef _MSC_VER 2 # define DEX_NOINLINE __declspec(noinline) 3 #else 4 # define DEX_NOINLINE __attribute__((__noinline__)) 5 #endif 6 7 DEX_NOINLINE 8 void Fibonacci(int terms, int& total) 9 { 10 int first = 0; 11 int second = 1; 12 13 for (int i = 0; i < terms; ++i) 14 { 15 int next = first + second; // DexWatch('i', 'first', 'second', 'total') 16 total +=...
2018 May 30
4
[SROA][DebugInfo][GSoC] Testing SROA on amalgamated sqlite source
Introduction ============ `SROA' is an early stage pass running at the very beginning of the pipeline in `-O{1,2,3}'. Greg Bedwell's report from his DExTer tool shows SROA on function as one of the major culprits of Debug Info loss. With debugify-each partially done I tried testing this on the amalgamated sqlite source. The steps are as follows: ,---- | # generate
2010 Sep 30
4
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
...ance, it's not clear whether it's the instruction selector that's at fault or if your .td files have a bug in them somewhere. The original code is: #include <stdio.h> typedef unsigned char e_u8; typedef unsigned short e_u16; e_u16 Calc_crc8(e_u8 data, e_u16 crc ) __attribute((__noinline__)); e_u16 Calc_crc8(e_u8 data, e_u16 crc ) { e_u8 i,x16,carry; for (i = 0; i < 2; i++) { x16 = (e_u8)(((data) ^ ((e_u8)crc))&1); if (x16 == 1) { crc ^= 0x4002; carry = 1...