search for: __gnu_h2f_ieee

Displaying 5 results from an estimated 5 matches for "__gnu_h2f_ieee".

2019 Dec 10
2
TypePromoteFloat loses intermediate rounding operations
...f, half* @w, align 2, !dbg !27, !tbaa !22 %5 = fadd half %3, %4, !dbg !28 store half %5, half* @x, align 2, !dbg !29, !tbaa !22 ret void, !dbg !30 } Then SelectionDAG type legalization comes along and creates this as the final assembly pushq %rax .cfi_def_cfa_offset 16 movzwl y(%rip), %edi callq __gnu_h2f_ieee movss %xmm0, 4(%rsp) # 4-byte Spill movzwl z(%rip), %edi callq __gnu_h2f_ieee addss 4(%rsp), %xmm0 # 4-byte Folded Reload movss %xmm0, 4(%rsp) # 4-byte Spill movzwl w(%rip), %edi callq __gnu_h2f_ieee addss 4(%rsp), %xmm0 # 4-byte Folded Reload callq __gnu_f2h_ieee movw %ax, x(%rip) popq %rax I as...
2019 Dec 10
2
TypePromoteFloat loses intermediate rounding operations
...gn 2, !dbg !29, !tbaa !22 > > ret void, !dbg !30 > > } > > > > > > Then SelectionDAG type legalization comes along and creates this as the > final assembly > > > > pushq %rax > > .cfi_def_cfa_offset 16 > > movzwl y(%rip), %edi > > callq __gnu_h2f_ieee > > movss %xmm0, 4(%rsp) # 4-byte Spill > > movzwl z(%rip), %edi > > callq __gnu_h2f_ieee > > addss 4(%rsp), %xmm0 # 4-byte Folded Reload > > movss %xmm0, 4(%rsp) # 4-byte Spill > > movzwl w(%rip), %edi > > callq __gnu_h2f_ieee > > addss 4(%rsp), %xmm...
2014 Jul 10
2
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
...efully) with no errors. That means, in your original example you would convert the following IR statement:   %Vt3_1 = fptrunc float %Vt_2 to half into   %Vt3_1 = call i16 @llvm.convert.to.fp16(float %Vt_2)   The downside is that you will have to add definitions for '__gnu_f2h_ieee' and '__gnu_h2f_ieee' in the compiler runtime. That is because the backend will expand all the float-half conversions into library calls... This workaround should work assuming that a) you can hack the backend, and b) it is acceptable (i.e. a reasonable solution in your case) to have a library call for every float-...
2014 Jul 25
3
[LLVMdev] FPU cannot be compatible with -soft-float code on mips by llc
Hi all, -soft-float can not be rightly use by llc. All float function operation will call soft float, but not hard. My mips device cannot support half float type, so I hack the llvm, and add soft half float and add -soft-float option. I add the function define for __gnu_f2h_ieee() and __gnu_h2f_ieee (), and it can call the soft half float. However, all the others function about float also call the soft float, how I do make only __gnu_f2h_ieee() use soft float, other use hard float??? Thank you all !! Cheers, Robin -------------- next part -------------- An HTML attachment was scr...
2014 Jul 09
4
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
On 07/09/2014 12:41 PM, Matt Arsenault wrote: > On 07/09/2014 03:30 PM, yalong at multicorewareinc.com wrote: >> Thank you Kevin!!! >> If I use fptrunc and bitcast realise NEON vcvtt ( I can sure, >> "fptrunc double %tmp to float" is right, but "fptrunc float %tmp to >> half" is wrong). My target platform is MIPS. The command as following: