Displaying 3 results from an estimated 3 matches for "996fb88".
2016 Oct 16
0
[PATCH 5/5] recognize and accelerate GM20x
...nknown chipset: NV%02X\n", chipset);
@@ -941,6 +942,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->Architecture = NV_KEPLER;
break;
case 0x110:
+ case 0x120:
pNv->Architecture = NV_MAXWELL;
break;
default:
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index 8da5051..996fb88 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -236,9 +236,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
} else if (pNv->dev->chipset < 0x110) {
class = 0xa197;
handle = 0x0000906e;
- } else {
+ } else if (pNv->dev->chipset < 0x120) {
class = 0xb097;
handle...
2016 Oct 17
2
[PATCH 5/5] recognize and accelerate GM20x
...-941,6 +942,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
> pNv->Architecture = NV_KEPLER;
> break;
> case 0x110:
> + case 0x120:
> pNv->Architecture = NV_MAXWELL;
> break;
> default:
> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
> index 8da5051..996fb88 100644
> --- a/src/nvc0_accel.c
> +++ b/src/nvc0_accel.c
> @@ -236,9 +236,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
> } else if (pNv->dev->chipset < 0x110) {
> class = 0xa197;
> handle = 0x0000906e;
> - } else {
> + } else if (pNv->dev->chipset <...
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
These are copied directly from the mesa repository.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++
src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++----------------
2 files changed, 892 insertions(+), 340 deletions(-)
create mode 100644 src/hwdefs/gm107_texture.xml.h
diff --git