search for: 80c51

Hello, It is a RISC with around 60 instructions like a 80c51 instruction set (without mul/div) and with Direct or indirect memory acces. There is a protected / user mode but the processor keep small and simple. 2009/11/23 Anton Korobeynikov <anton at korobeynikov.info> > Hello Guillaume, > > > - Is there estimation (from your experience...

Hello > It is a RISC with around 60 instructions like a 80c51 instruction set > (without mul/div) and with Direct or indirect memory acces. My estimate is something like a man-week for a person, who knows what to do :) I guess the instruction set is pretty similar to msp430's for which we already have a backend. In such situation you might just grab t...

On Monday 23 November 2009 09:01, Anton Korobeynikov wrote: > Hello > > > It is a RISC with around 60 instructions like a 80c51 instruction set > > (without mul/div) and with Direct or indirect memory acces. > > My estimate is something like a man-week for a person, who knows what to do > :) That's pretty optimistic, even for someone who knows what to do. The learning curve for TableGen is quite steep....

On Nov 24, 2009, at 8:30 AM, David Greene wrote: > On Monday 23 November 2009 09:01, Anton Korobeynikov wrote: >> Hello >> >>> It is a RISC with around 60 instructions like a 80c51 instruction set >>> (without mul/div) and with Direct or indirect memory acces. >> >> My estimate is something like a man-week for a person, who knows what to do >> :) > > That's pretty optimistic, even for someone who knows what to do. > > The learning...

Hello Guillaume, > - Is there estimation (from your experiences) of the work required to > implement a backend for a simple 8bits micro controller architecture (1 > men-month, 10 or 100 ?) What is the instruction set of your microcontroller? How rich it is? What is the architecture? Is it RISC-y? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint

...update. Can I have more detail about the Simulator/Debugger part(at an assembler level?) ? I'm not sure if LLVM is able to provide such functionalities. 2009/11/23 Anton Korobeynikov <anton at korobeynikov.info> > Hello > > > It is a RISC with around 60 instructions like a 80c51 instruction set > > (without mul/div) and with Direct or indirect memory acces. > My estimate is something like a man-week for a person, who knows what to do > :) > > I guess the instruction set is pretty similar to msp430's for which we > already have a backend. In such si...

...ight way. 2009/11/24 Evan Cheng <evan.cheng at apple.com> > > On Nov 24, 2009, at 8:30 AM, David Greene wrote: > > > On Monday 23 November 2009 09:01, Anton Korobeynikov wrote: > >> Hello > >> > >>> It is a RISC with around 60 instructions like a 80c51 instruction set > >>> (without mul/div) and with Direct or indirect memory acces. > >> > >> My estimate is something like a man-week for a person, who knows what to > do > >> :) > > > > That's pretty optimistic, even for someone who knows wh...

Hi all, I'm new to LLVM dev mailling list and I'm starting to discover some aspects of LLVM. Actually I'm looking for a solution to create a tool chain for my own chip (a 8bit micro controller processor) that include a compiler/linker/assembler toolset and a simulator/debugger. >From what I've read, LLVM is a good tool to implement a compiler for this proprietary platform,