search for: 80000000h

..." command line +CpuIs64 resw 1 ; Is this cpu a x86_64 machine? ; ; PXE packets which don't need static initialization @@ -392,6 +393,27 @@ call writestr ; +; ID the CPU: Shamelessly borrowed from the Linux kernel arch/x86_64/kernel/head.S +; + mov word [CpuIs64], 0 + mov eax, 80000000h + cpuid + cmp eax, 80000000h + jbe afterbits + ; Check if long mode is implemented + mov eax, 80000001h + cpuid + bt edx, 29 + jnc afterbits + mov word [CpuIs64], 1 +afterbits: + mov si, cpu64_str + cmp word [CpuIs64], 1 + je writecpustr + mov si, cpu32_str +writecpustr: call writestr...

...001, edx) +; This is bit 30 for Intel CPUs, and bit 29 for AMD CPUs +; + mov eax, 00000000h ; Find last Intel cpuid # + cpuid + cmp eax, 00000000h + je test_amd + mov eax, 00000001h ; Read Intel CPU flags + cpuid + bt edx, 30 ; 64-bit if bit 30 is set + jc is_64bit + +test_amd: mov eax, 80000000h ; Find last AMD cpuid # + cpuid + cmp eax, 80000000h + jbe is_32bit + mov eax, 80000001h ; Read AMD CPU flags + cpuid + bt edx, 29 ; 64-bit if bit 29 is set + jnc is_32bit + +is_64bit: mov byte [Is64Bit],1 ; Flag that we're 64-bit +is_32bit: diff -ur syslinux-3.31.orig/keywords sysl...

...; CODE XREF: start+7C^Yp 0075F000 call ds:GetVersion 0075F006 movzx ecx, ah 0075F009 movzx edx, al 0075F00C mov dword_75D738, ecx 0075F012 mov dword_75D730, edx 0075F018 test eax, 80000000h 0075F01D jz short loc_75F03C 0075F01F cmp edx, 4 0075F022 jge short loc_75F030 0075F024 mov dword_75D734, 1 0075F02E jmp short locret_75F046 0075F030 0075F030 loc_75F030:...

I would be interested in learning what the set of used semantics for float-to-int conversion is. If the only two used are 1) undefined behavior if unrepresentable and 2) saturate to int_{min,max} with NaN going to zero, then I think it makes sense to expose both of those natively in the IR. If the set is much larger, I think separate intrinsics for each behavior would make sense. It would be nice