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...ays better. Improvements may still be seen when >> + * matching chunks from NVMe storage even on newer CPUs. >> + * >> + * Benchmarks C SSE2 SSSE3 >> + * - Intel Atom D2700 550 MB/s 750 MB/s 1000 MB/s >> + * - Intel i7-7700hq 1850 MB/s 2550 MB/s 4050 MB/s >> + * - AMD ThreadRipper 2950x 2900 MB/s 5600 MB/s 8950 MB/s >> + * >> + * This optimization for get_checksum1 is intentionally limited to x86-64 as >> + * no 32-bit CPU was available for testing. As 32-bit CPUs only have...

...s/DRI/nouveau Assignee: nouveau at lists.freedesktop.org Reporter: ramazanerol91 at gmail.com QA Contact: nouveau at lists.freedesktop.org I observed this on Linux Mint 18.3 Cinnamon. It gives Nouveau Drm Pointer error and refuses to boot. My specs are; Intel Core i7 7700HQ Nvidia Gtx 1050 You can try it with a live usb. Also setting nomodeset for boot didn't affect. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. -------------- next part -------------- An HTML attachment was scrubbed... URL: <ht...

...ne). > > However this patch is not for MD5 performance, rather for the rolling > checksum rsync uses to match blocks on existing files on both ends to > reduce transfer size. Still. You claim in your patch that | Benchmarks C SSE2 SSSE3 | - Intel i7-7700hq 1850 MB/s 2550 MB/s 4050 MB/s while xxhash [0] claims on a Core i5-3340M @2.7GHz that: |Version Speed on 64-bit Speed on 32-bit |XXH64 13.8 GB/s 1.9 GB/s so using xxhash64 for that work would also boost !x86 platforms. However your patch has the benefit that no changes are requi...

...ntation, and it benchmarked about the same as xxhash on the CPUs I used for testing, which should not be the case. Discovered performance was limited by CSUM_CHUNK reads for multiple checksum types. Have observed near 3x performance gains in rsync --checksum from cached files with xxhash on the i7-7700hq. P.S. Wayne, in the xxhash part of file_checksum(), processing the remainder reads CHUNK bytes rather than remainder bytes like the other hashes do. I don't think it matters, but just in case. GitHub: https://github.com/Chainfire/rsync/commit/aa5ddaae5018180952a09ffaffc1ace88a1fe99d (.patch)...

...to be CPU limited, + * lower CPU usage is always better. Improvements may still be seen when + * matching chunks from NVMe storage even on newer CPUs. + * + * Benchmarks C SSE2 SSSE3 + * - Intel Atom D2700 550 MB/s 750 MB/s 1000 MB/s + * - Intel i7-7700hq 1850 MB/s 2550 MB/s 4050 MB/s + * - AMD ThreadRipper 2950x 2900 MB/s 5600 MB/s 8950 MB/s + * + * This optimization for get_checksum1 is intentionally limited to x86-64 as + * no 32-bit CPU was available for testing. As 32-bit CPUs only have half the + * available xmm register...

...wer CPU usage is always better. Improvements may still be seen when > + * matching chunks from NVMe storage even on newer CPUs. > + * > + * Benchmarks C SSE2 SSSE3 > + * - Intel Atom D2700 550 MB/s 750 MB/s 1000 MB/s > + * - Intel i7-7700hq 1850 MB/s 2550 MB/s 4050 MB/s > + * - AMD ThreadRipper 2950x 2900 MB/s 5600 MB/s 8950 MB/s > + * > + * This optimization for get_checksum1 is intentionally limited to x86-64 > as > + * no 32-bit CPU was available for testing. As 32-bit CPUs only have half >...

...to be CPU limited, + * lower CPU usage is always better. Improvements may still be seen when + * matching chunks from NVMe storage even on newer CPUs. + * + * Benchmarks C SSE2 SSSE3 + * - Intel Atom D2700 550 MB/s 750 MB/s 1000 MB/s + * - Intel i7-7700hq 1850 MB/s 2550 MB/s 4050 MB/s + * - AMD ThreadRipper 2950x 2900 MB/s 5600 MB/s 8950 MB/s + * + * This optimization for get_checksum1() is intentionally limited to x86-64 + * as no 32-bit CPU was available for testing. As 32-bit CPUs only have half + * the available xmm regist...

...wer CPU usage is always better. Improvements may still be seen when > + * matching chunks from NVMe storage even on newer CPUs. > + * > + * Benchmarks C SSE2 SSSE3 > + * - Intel Atom D2700 550 MB/s 750 MB/s 1000 MB/s > + * - Intel i7-7700hq 1850 MB/s 2550 MB/s 4050 MB/s > + * - AMD ThreadRipper 2950x 2900 MB/s 5600 MB/s 8950 MB/s > + * > + * This optimization for get_checksum1() is intentionally limited to x86-64 > + * as no 32-bit CPU was available for testing. As 32-bit CPUs only have half > + *...

What do you base this on? Per https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html : "For the x86-32 compiler, you must use -march=cpu-type, -msse or -msse2 switches to enable SSE extensions and make this option effective. For the x86-64 compiler, these extensions are enabled by default." That reads to me like we're fine for SSE2. As stated in my comments, SSSE3 support must be

...de from changing the function and file names. + * The MD5_CTX structure as expected here (from OpenSSL) is binary compatible + * with the md_context used by rsync, for the fields accessed. + * + * Benchmarks (in MB/s) C ASM + * - Intel Atom D2700 302 334 + * - Intel i7-7700hq 351 376 + * - AMD ThreadRipper 2950x 728 784 + * + * The original code was also incorporated into OpenSSL. It has since been + * modified there. Those changes have not been made here due to licensing + * incompatibilities. Benchmarks of those changes on the above CPUs did n...

...ernatives memory: 16K [ 0.035058] smpboot: Max logical packages: 2 [ 0.036281] x2apic: IRQ remapping doesn't support X2APIC mode [ 0.040609] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 [ 0.050638] TSC deadline timer enabled [ 0.050643] smpboot: CPU0: Intel(R) Core(TM) i7-7700HQ CPU @ 2.80GHz (family: 0x6, model: 0x9e, stepping: 0x9) [ 0.054017] Performance Events: PEBS fmt3+, Skylake events, 32-deep LBR, full-width counters, Intel PMU driver. [ 0.054059] ... version: 4 [ 0.054059] ... bit width: 48 [ 0.054060] ... generic registers:...

https://bugs.freedesktop.org/show_bug.cgi?id=75985 Priority: medium Bug ID: 75985 Assignee: nouveau at lists.freedesktop.org Summary: HDMI audio device only visible after rescan QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux (All) Reporter: jean-louis at