search for: 64b

Hi, The profiler pass currently uses 'unsigned' (32b) counters. These counters are not large enough for some of the programs I am profiling. I want to re-write the profiling tools for 64b counters. How much of an effort will that be? Thanks. -Apala

Hello, Following some recent messages about building with Visual Studio 2010, I have gotten most things to compile in release mode on 64b windows 7. (Mainly the few errors with 0 -> nullptr in the second argument of the pair constructor, and making an ECValue constructor public). I'm falling at the last hurdle though when it comes to the final link: 1>------ Build started: Project: Fibonacci, Configuration: Release x64 --...

...ct then yes this works. With a default windows install and with a few GPO changes. > Early samba4 versions does not support (or have a buggy support) for auto->register PTR recors, as far i remember. I use windows to let it register and update its own record. My setup. Samba 4.4.5, win7 64b/win10 64b. Static and dhcp ips. ( dhcp is not linked to the samba DC ) I did set in the gpo, in network/DNS client. ( computer policy ) The connections specific DNS suffix. Enable dynamic update. Primay DNS suffic Register PTR. Greetz, Louis

"Bill O'Hara" <billtohara at gmail.com> writes: > 1>LLVMX86CodeGen.lib(X86JITInfo.obj) : error LNK2019: unresolved > external symbol X86CompilationCallback referenced in function "public: > virtual void (__cdecl*__cdecl > llvm::X86JITInfo::getLazyResolverFunction(void * (__cdecl*)(void > *)))(void)" (?getLazyResolverFunction at

...e trials I found that it runs fine up to 15 cores. From 16 or more, the BSOD kicks in when booting the domU. The hardware (4 times X7550) runs Xen version 4.1.2_05-1.1.1 (abuild@) (gcc version 4.6.2 (SUSE Linux) (openSUSE 12.1) ). Dom0: 3.1.9-1.4-xen x86_64 DomU: Windows 2008 Server R2 Enterprise 64b. This happened with versions 0.11.0.308 and 0.11.0.356. Is this a known problem? Best regards, Dion

...s happening with Nut 2.0.1 and also Nut 2.0.5. I have an AMD64 bit > processor, Mandriva 2007 64 bit. > > Any suggestions as to what I should do to investigate this? > > The error I got from the fenton drive was: > Short read during UPS id sequence I wonder if were not facing a 64b bugs?! can you make another test with nut 2.0.5 + megatec + same ups on a 32 bits system, and report back. Any developer with a 64b setup to report back? Arnaud -- Linux / Unix Expert - MGE UPS SYSTEMS - R&D Dpt Network UPS Tools (NUT) Project Leader - http://www.networkupstools.org/ Debian...

Is that even a valid instruction? I thought TEST only took 32-bit immediates. Fiona > On Jan 22, 2015, at 2:48 PM, Chris Sears <chris.sears at gmail.com> wrote: > > The problem is that REX TEST reg,#(1<<37) is 10 bytes vs 5 bytes for REX BT reg,37. > That's a large space penalty to pay for a possible partial update stall. > > So the idea of generating BT for

...isk of flags merging penalty has to be better than two ops, one of which is ~9-10 bytes). Fiona > On Jan 22, 2015, at 2:59 PM, Chris Sears <chris.sears at gmail.com> wrote: > > My bad on that. So that's what the comment meant. > That means BT is pretty much req'd in the 64b case.

...s happening with Nut 2.0.1 and also Nut 2.0.5. I have an AMD64 bit > processor, Mandriva 2007 64 bit. > > Any suggestions as to what I should do to investigate this? > > The error I got from the fenton drive was: > Short read during UPS id sequence I wonder if were not facing a 64b bugs?! can you make another test with nut 2.0.5 + megatec + same ups on a 32 bits system, and report back. Any developer with a 64b setup to report back? Arnaud -- Linux / Unix Expert - MGE UPS SYSTEMS - R&D Dpt Network UPS Tools (NUT) Project Leader - http://www.networkupstools.org/ Debian...

...gt;> is. Given the current definition of ptrtoint and intoptr, I feel that >>>> the addressing structure feels like a flat memory model starting from 0 >>>> and the value "b" should be 65529. In your example where we know the >>>> largest pointer is 64b, I would expect the final result to be the same >>>> as doing a ptrtoint from int(1) to i64 and intotptr to int(2)*. >>> [Villmow, Micah] So then if there is already a way to do this, what really is the benefit of adding a new instruction? >>> Also there is a typo in...

...onment >>> is. Given the current definition of ptrtoint and intoptr, I feel that >>> the addressing structure feels like a flat memory model starting from 0 >>> and the value "b" should be 65529. In your example where we know the >>> largest pointer is 64b, I would expect the final result to be the same >>> as doing a ptrtoint from int(1) to i64 and intotptr to int(2)*. >> [Villmow, Micah] So then if there is already a way to do this, what really is the benefit of adding a new instruction? >> Also there is a typo in my example,...

...en yes this works. With a default windows install and with a few GPO changes. > Early samba4 versions does not support (or have a buggy support) > for auto->register PTR recors, as far i remember. I use windows to let it register and update its own record. My setup. Samba 4.4.5, win7 64b/win10 64b. Static and dhcp ips. ( dhcp is not linked to the samba DC ) I did set in the gpo, in network/DNS client. ( computer policy ) The connections specific DNS suffix. Enable dynamic update. Primay DNS suffic Register PTR. Greetz, Louis It is the last one 'Register PTR' tha...

...2:$OffsetB), (COPY_TO_REGCLASS (FDIV_A_oo FPUaOffsetOperand:$OffsetA,FPUaOffsetOperand:$OffsetB),FPUaOffsetClass)>; The instruction lowering goes as expected all instances of FMUL_A_oo are followed by a COPY, freeing the usage of FPUaROUTMULRegisterClass. These COPY are at positions 64B and 112B in the example below. So far, so good. My problem arise in some pre-RA instruction scheduling optimization moving these COPY at later positions 104B and 112B. The new code sequence leaves two FMUL_A_oo without COPY. So this requires 2 registers from FPUaROUTMULRegisterClass (which only in...

...lanations besides polling > improving the efficiency. For example, increasing system load might > disable host power management. > Hi Michael, I re-ran the tests, this time with the "turbo mode" and "C-states" features off. No Polling: 1 VM running netperf (msg size 64B): 1107 Mbits/sec Polling: 1 VM running netperf (msg size 64B): 1572 Mbits/sec As you can see from the new results, the numbers are lower, but relatively (polling on/off) there's no change. Thank you, Razya > > > > -- > > > MST > > > > -- &gt...

...lanations besides polling > improving the efficiency. For example, increasing system load might > disable host power management. > Hi Michael, I re-ran the tests, this time with the "turbo mode" and "C-states" features off. No Polling: 1 VM running netperf (msg size 64B): 1107 Mbits/sec Polling: 1 VM running netperf (msg size 64B): 1572 Mbits/sec As you can see from the new results, the numbers are lower, but relatively (polling on/off) there's no change. Thank you, Razya > > > > -- > > > MST > > > > -- &gt...

...ing, iff the shift amount is defined to be modulo and the machine is two's complement. I'm a bit worried that while modulo is the Obviously Right Thing for rotates, the situation is less clear for general funnel shifts. I looked over some of the ISAs I have docs at hand for: - x86 (32b/64b variants) has SHRD/SHLD, so both right and left variants. Count is modulo (mod 32 for 32b instruction variants, mod 64 for 64b instruction variants). As of BMI2, we also get RORX (non-flag-setting ROR) but no ROLX. - ARM AArch64 has EXTR, which is a right funnel shift, but shift distances must...

...reg, <ga:@val>[TF=5], %noreg; mem:LD8[GOT] GR64:%vreg0 32B %vreg1<def> = MOV64rm %RIP, 1, %noreg, <ga:@p>[TF=5], %noreg; mem:LD8[GOT] GR64:%vreg1 48B MOV64mr %vreg1, 1, %noreg, 0, %noreg, %vreg0; mem:ST8[@p](tbaa=!"any pointer") GR64:%vreg1,%vreg0 64B %vreg2<def> = MOV64ri 12345123400; GR64:%vreg2 80B MOV64mr %vreg0, 1, %noreg, 0, %noreg, %vreg2; mem:ST8[@val](tbaa=!"long long") GR64:%vreg0,%vreg2 96B %RDI<def> = COPY %vreg2; GR64:%vreg2 112B TCRETURNdi64 <ga:@xtr>, 0, &l...

...inksys wireless access point (WAP54g) and 3 wireless bridges (WET54g), I have found that it works most of the time with WPA encryption on, but will occasionally drop voice (loosing packets). With no encryption on the WLAN it seems to work without a hitch! Using a less CPU intense encryption such as 64bit WEP, things also work fine. There must be too much delay with higher rate encryption. Also we had one bridge that seemed to be a week puppy in the litter. It could only muster 60-70% signal strength. It seemed to have problems under all configurations. Finally we positioned it such that it too w...

Hi! I want to upgrade hardware on my router (iptables, htb, >1000 users). Now it is based on usual desktop PC (Intel Prescott P4 3.00 Ghz, 1 Gb RAM). The reason of hardware upgrade is growing up number of users, also we are planning to increase upstream link from 100 Mbit/s to 1 Gbit/s. Iptables rules are now optimized with ipset tool, for tc I''m using hash tables as well. So I

...char *kernel, *initrd; char cmdline[1024]; int i; unsigned p; s_cpu cpu; openconsole(&dev_stdcon_r, &dev_stdcon_w); if (argc < 5) { fprintf(stderr, "missing options, usage:\n" " l23or64 <32b kernel> <32b initrd> \\" " <64b kernel> <64b initrd> \\" " [kernel arguments]\n"); return 1; } detect_cpu(&cpu); if (cpu.flags.lm) { initrd = argv[4]; kernel = argv[3]; } else { initrd = argv[2]; kernel = argv[1]; } p = snprintf(cmdline, sizeof cmdline - 1, "%s init...