search for: 41e1014c

Displaying 2 results from an estimated 2 matches for "41e1014c".

2010 Sep 02
0
[LLVMdev] [LLVMDev] [Modeling] About the structure of my allocator
...t; into. > > How do I model the registers R and register blocks r to obtain my desired > information? > > - Thanks > - Jeff Kunkel > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100902/41e1014c/attachment.html>
2010 Sep 02
5
[LLVMdev] [LLVMDev] [Modeling] About the structure of my allocator
I need to model my registers for my allocator. I need to identify the super-register and the sub-register conflicts. Something like: For each set of registers R in the set of aligned registers defined by the input request virtual register alpha. Now each register block r in R can have zero, one, or more registers defined in the block started at the aligned size and ending at the aligned size plus