search for: 2fddfbe0

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2018 Jun 21
3
Target hardware loop instruction via intrinsics
Hi, Hexagon has a MIR pass for detecting loops that map onto hardware support. I think a similar approach would be viable for my target but am put off by the complexity of determining whether a given loop is legal to transform. Instead, I would like to pass the responsibility for determining legality onto the C programmer who is assumed sufficiently familiar with the architecture. I think this